]> git.baikalelectronics.ru Git - kernel.git/commitdiff
mmc: sdhci-msm: Read and use DLL Config property from device tree file
authorSarthak Garg <sartgarg@codeaurora.org>
Fri, 22 May 2020 09:32:28 +0000 (15:02 +0530)
committerUlf Hansson <ulf.hansson@linaro.org>
Thu, 28 May 2020 09:22:16 +0000 (11:22 +0200)
Certain platforms require different settings in the
SDCC_HC_REG_DLL_CONFIG register. This setting can change from platform
to platform. So the driver should check whether a particular platform
require a different setting by reading the DT file and use it.

Also use msm_cm_dll_set_freq only when DLL not supplied.

Signed-off-by: Bao D. Nguyen <nguyenb@codeaurora.org>
Signed-off-by: Sarthak Garg <sartgarg@codeaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1590139950-7288-7-git-send-email-sartgarg@codeaurora.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-msm.c

index 1e406f500ffcb00b923d9622f011b0380672a09f..61cf0f1da85dbc72c0d7022a72b81d1fdc4b326c 100644 (file)
@@ -275,6 +275,7 @@ struct sdhci_msm_host {
        u32 transfer_mode;
        bool updated_ddr_cfg;
        bool uses_tassadar_dll;
+       u32 dll_config;
        u32 ddr_config;
 };
 
@@ -617,6 +618,9 @@ static int msm_init_cm_dll(struct sdhci_host *host)
        config &= ~CORE_CLK_PWRSAVE;
        writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec);
 
+       config = msm_host->dll_config;
+       writel_relaxed(config, host->ioaddr + msm_offset->core_dll_config);
+
        if (msm_host->use_14lpp_dll_reset) {
                config = readl_relaxed(host->ioaddr +
                                msm_offset->core_dll_config);
@@ -642,7 +646,9 @@ static int msm_init_cm_dll(struct sdhci_host *host)
        config |= CORE_DLL_PDN;
        writel_relaxed(config, host->ioaddr +
                        msm_offset->core_dll_config);
-       msm_cm_dll_set_freq(host);
+
+       if (!msm_host->dll_config)
+               msm_cm_dll_set_freq(host);
 
        if (msm_host->use_14lpp_dll_reset &&
            !IS_ERR_OR_NULL(msm_host->xo_clk)) {
@@ -682,7 +688,8 @@ static int msm_init_cm_dll(struct sdhci_host *host)
                        msm_offset->core_dll_config);
 
        if (msm_host->use_14lpp_dll_reset) {
-               msm_cm_dll_set_freq(host);
+               if (!msm_host->dll_config)
+                       msm_cm_dll_set_freq(host);
                config = readl_relaxed(host->ioaddr +
                                msm_offset->core_dll_config_2);
                config &= ~CORE_DLL_CLOCK_DISABLE;
@@ -1944,6 +1951,8 @@ static inline void sdhci_msm_get_of_property(struct platform_device *pdev,
        if (of_property_read_u32(node, "qcom,ddr-config",
                                &msm_host->ddr_config))
                msm_host->ddr_config = DDR_CONFIG_POR_VAL;
+
+       of_property_read_u32(node, "qcom,dll-config", &msm_host->dll_config);
 }