net/mlx5: Add IFC bits and enums for flow meter

Add/extend structure layouts and defines for flow meter.

Signed-off-by: Jianbo Liu <jianbol@nvidia.com>
Reviewed-by: Ariel Levkovich <lariel@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>

diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index 604b85dd770a4b064eef2d8fa844142aa3518a3b..15ac02eeed4fb82d0f53f9032b0d05123ce1a9f6 100644 (file)
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -455,6 +455,7 @@ enum {
 
        MLX5_OPCODE_UMR                 = 0x25,
 
+       MLX5_OPCODE_ACCESS_ASO          = 0x2d,
 };
 
 enum {

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 789d64400744845f4a71d495af6a7a2d41ed4dc6..91872afb2bfe4baa5bbe4422054606b5f799d1b6 100644 (file)
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -442,7 +442,9 @@ struct mlx5_ifc_flow_table_prop_layout_bits {
        u8         max_modify_header_actions[0x8];
        u8         max_ft_level[0x8];
 
-       u8         reserved_at_40[0x20];
+       u8         reserved_at_40[0x6];
+       u8         execute_aso[0x1];
+       u8         reserved_at_47[0x19];
 
        u8         reserved_at_60[0x2];
        u8         reformat_insert[0x1];
@@ -940,7 +942,17 @@ struct mlx5_ifc_qos_cap_bits {
 
        u8         max_tsar_bw_share[0x20];
 
-       u8         reserved_at_100[0x700];
+       u8         reserved_at_100[0x20];
+
+       u8         reserved_at_120[0x3];
+       u8         log_meter_aso_granularity[0x5];
+       u8         reserved_at_128[0x3];
+       u8         log_meter_aso_max_alloc[0x5];
+       u8         reserved_at_130[0x3];
+       u8         log_max_num_meter_aso[0x5];
+       u8         reserved_at_138[0x8];
+
+       u8         reserved_at_140[0x6c0];
 };
 
 struct mlx5_ifc_debug_cap_bits {
@@ -3280,6 +3292,7 @@ enum {
        MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2 = 0x800,
        MLX5_FLOW_CONTEXT_ACTION_IPSEC_DECRYPT = 0x1000,
        MLX5_FLOW_CONTEXT_ACTION_IPSEC_ENCRYPT = 0x2000,
+       MLX5_FLOW_CONTEXT_ACTION_EXECUTE_ASO = 0x4000,
 };
 
 enum {
@@ -3295,6 +3308,38 @@ struct mlx5_ifc_vlan_bits {
        u8         vid[0xc];
 };
 
+enum {
+       MLX5_FLOW_METER_COLOR_RED       = 0x0,
+       MLX5_FLOW_METER_COLOR_YELLOW    = 0x1,
+       MLX5_FLOW_METER_COLOR_GREEN     = 0x2,
+       MLX5_FLOW_METER_COLOR_UNDEFINED = 0x3,
+};
+
+enum {
+       MLX5_EXE_ASO_FLOW_METER         = 0x2,
+};
+
+struct mlx5_ifc_exe_aso_ctrl_flow_meter_bits {
+       u8        return_reg_id[0x4];
+       u8        aso_type[0x4];
+       u8        reserved_at_8[0x14];
+       u8        action[0x1];
+       u8        init_color[0x2];
+       u8        meter_id[0x1];
+};
+
+union mlx5_ifc_exe_aso_ctrl {
+       struct mlx5_ifc_exe_aso_ctrl_flow_meter_bits exe_aso_ctrl_flow_meter;
+};
+
+struct mlx5_ifc_execute_aso_bits {
+       u8        valid[0x1];
+       u8        reserved_at_1[0x7];
+       u8        aso_object_id[0x18];
+
+       union mlx5_ifc_exe_aso_ctrl exe_aso_ctrl;
+};
+
 struct mlx5_ifc_flow_context_bits {
        struct mlx5_ifc_vlan_bits push_vlan;
 
@@ -3326,7 +3371,9 @@ struct mlx5_ifc_flow_context_bits {
 
        struct mlx5_ifc_fte_match_param_bits match_value;
 
-       u8         reserved_at_1200[0x600];
+       struct mlx5_ifc_execute_aso_bits execute_aso[4];
+
+       u8         reserved_at_1300[0x500];
 
        union mlx5_ifc_dest_format_struct_flow_counter_list_auto_bits destination[];
 };
@@ -5973,7 +6020,9 @@ struct mlx5_ifc_general_obj_in_cmd_hdr_bits {
 
        u8         obj_id[0x20];
 
-       u8         reserved_at_60[0x20];
+       u8         reserved_at_60[0x3];
+       u8         log_obj_range[0x5];
+       u8         reserved_at_68[0x18];
 };
 
 struct mlx5_ifc_general_obj_out_cmd_hdr_bits {
@@ -11373,12 +11422,14 @@ enum {
        MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_ENCRYPTION_KEY = BIT_ULL(0xc),
        MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_IPSEC = BIT_ULL(0x13),
        MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_SAMPLER = BIT_ULL(0x20),
+       MLX5_HCA_CAP_GENERAL_OBJECT_TYPES_FLOW_METER_ASO = BIT_ULL(0x24),
 };
 
 enum {
        MLX5_GENERAL_OBJECT_TYPES_ENCRYPTION_KEY = 0xc,
        MLX5_GENERAL_OBJECT_TYPES_IPSEC = 0x13,
        MLX5_GENERAL_OBJECT_TYPES_SAMPLER = 0x20,
+       MLX5_GENERAL_OBJECT_TYPES_FLOW_METER_ASO = 0x24,
 };
 
 enum {
@@ -11451,6 +11502,61 @@ struct mlx5_ifc_create_encryption_key_in_bits {
        struct mlx5_ifc_encryption_key_obj_bits encryption_key_object;
 };
 
+enum {
+       MLX5_FLOW_METER_MODE_BYTES_IP_LENGTH            = 0x0,
+       MLX5_FLOW_METER_MODE_BYTES_CALC_WITH_L2         = 0x1,
+       MLX5_FLOW_METER_MODE_BYTES_CALC_WITH_L2_IPG     = 0x2,
+       MLX5_FLOW_METER_MODE_NUM_PACKETS                = 0x3,
+};
+
+struct mlx5_ifc_flow_meter_parameters_bits {
+       u8         valid[0x1];
+       u8         bucket_overflow[0x1];
+       u8         start_color[0x2];
+       u8         both_buckets_on_green[0x1];
+       u8         reserved_at_5[0x1];
+       u8         meter_mode[0x2];
+       u8         reserved_at_8[0x18];
+
+       u8         reserved_at_20[0x20];
+
+       u8         reserved_at_40[0x3];
+       u8         cbs_exponent[0x5];
+       u8         cbs_mantissa[0x8];
+       u8         reserved_at_50[0x3];
+       u8         cir_exponent[0x5];
+       u8         cir_mantissa[0x8];
+
+       u8         reserved_at_60[0x20];
+
+       u8         reserved_at_80[0x3];
+       u8         ebs_exponent[0x5];
+       u8         ebs_mantissa[0x8];
+       u8         reserved_at_90[0x3];
+       u8         eir_exponent[0x5];
+       u8         eir_mantissa[0x8];
+
+       u8         reserved_at_a0[0x60];
+};
+
+struct mlx5_ifc_flow_meter_aso_obj_bits {
+       u8         modify_field_select[0x40];
+
+       u8         reserved_at_40[0x40];
+
+       u8         reserved_at_80[0x8];
+       u8         meter_aso_access_pd[0x18];
+
+       u8         reserved_at_a0[0x160];
+
+       struct mlx5_ifc_flow_meter_parameters_bits flow_meter_parameters[2];
+};
+
+struct mlx5_ifc_create_flow_meter_aso_obj_in_bits {
+       struct mlx5_ifc_general_obj_in_cmd_hdr_bits hdr;
+       struct mlx5_ifc_flow_meter_aso_obj_bits flow_meter_aso_obj;
+};
+
 struct mlx5_ifc_sampler_obj_bits {
        u8         modify_field_select[0x40];