drm/amd/pm: support runtime pptable update for sienna_cichlid etc.

This avoids smu issue when enabling runtime pptable update for
sienna_cichlid and so on. Runtime pptable udpate is needed for test
and debug purpose.

Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index 0826625573dcea21e57e913ba778f3d1b9b382b3..63f945f9f331781f4819c31df880807aec87423c 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -1126,7 +1126,7 @@ static int smu_disable_dpms(struct smu_context *smu)
         */
        if (smu->uploading_custom_pp_table &&
            (adev->asic_type >= CHIP_NAVI10) &&
-           (adev->asic_type <= CHIP_NAVI12))
+           (adev->asic_type <= CHIP_NAVY_FLOUNDER))
                return 0;
 
        /*
@@ -1211,7 +1211,9 @@ static int smu_hw_fini(void *handle)
 int smu_reset(struct smu_context *smu)
 {
        struct amdgpu_device *adev = smu->adev;
-       int ret = 0;
+       int ret;
+
+       amdgpu_gfx_off_ctrl(smu->adev, false);
 
        ret = smu_hw_fini(adev);
        if (ret)
@@ -1222,8 +1224,12 @@ int smu_reset(struct smu_context *smu)
                return ret;
 
        ret = smu_late_init(adev);
+       if (ret)
+               return ret;
 
-       return ret;
+       amdgpu_gfx_off_ctrl(smu->adev, true);
+
+       return 0;
 }
 
 static int smu_suspend(void *handle)