]> git.baikalelectronics.ru Git - kernel.git/commitdiff
drm/amd/amdgpu: limit one queue per gang
authorJack Xiao <Jack.Xiao@amd.com>
Wed, 22 Mar 2023 01:31:16 +0000 (09:31 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 30 May 2023 13:03:19 +0000 (14:03 +0100)
commit 5ee33d905f89c18d4b33da6e5eefdae6060502df upstream.

Limit one queue per gang in mes self test,
due to mes schq fw change.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c

index 7e8b7171068dc427b7b1088ec67dab146de8d4c0..bebd136ed54443b1f5fe6b8e52d8dce6afb65fe1 100644 (file)
@@ -1328,12 +1328,9 @@ int amdgpu_mes_self_test(struct amdgpu_device *adev)
        struct amdgpu_mes_ctx_data ctx_data = {0};
        struct amdgpu_ring *added_rings[AMDGPU_MES_CTX_MAX_RINGS] = { NULL };
        int gang_ids[3] = {0};
-       int queue_types[][2] = { { AMDGPU_RING_TYPE_GFX,
-                                  AMDGPU_MES_CTX_MAX_GFX_RINGS},
-                                { AMDGPU_RING_TYPE_COMPUTE,
-                                  AMDGPU_MES_CTX_MAX_COMPUTE_RINGS},
-                                { AMDGPU_RING_TYPE_SDMA,
-                                  AMDGPU_MES_CTX_MAX_SDMA_RINGS } };
+       int queue_types[][2] = { { AMDGPU_RING_TYPE_GFX, 1 },
+                                { AMDGPU_RING_TYPE_COMPUTE, 1 },
+                                { AMDGPU_RING_TYPE_SDMA, 1} };
        int i, r, pasid, k = 0;
 
        pasid = amdgpu_pasid_alloc(16);