#define ARM_LOCAL_PSTATE_WIDTH 4
#define ARM_LOCAL_PSTATE_MASK ((1 << ARM_LOCAL_PSTATE_WIDTH) - 1)
+#if PSCI_OS_INIT_MODE
+#define ARM_LAST_AT_PLVL_MASK (ARM_LOCAL_PSTATE_MASK << \
+ (ARM_LOCAL_PSTATE_WIDTH * \
+ (PLAT_MAX_PWR_LVL + 1)))
+#endif /* __PSCI_OS_INIT_MODE__ */
+
/* Macros to construct the composite power state */
/* Make composite power state parameter till power level 0 */
* FVP handler called when a power domain is about to be suspended. The
* target_state encodes the power state that each level should transition to.
******************************************************************************/
+#if PSCI_OS_INIT_MODE
+static int fvp_pwr_domain_suspend(const psci_power_state_t *target_state)
+#else
static void fvp_pwr_domain_suspend(const psci_power_state_t *target_state)
+#endif
{
unsigned long mpidr;
*/
if (target_state->pwr_domain_state[ARM_PWR_LVL0] ==
ARM_LOCAL_STATE_RET)
+#if PSCI_OS_INIT_MODE
+ return PSCI_E_SUCCESS;
+#else
return;
+#endif
assert(target_state->pwr_domain_state[ARM_PWR_LVL0] ==
ARM_LOCAL_STATE_OFF);
/* Program the power controller to power off this cpu. */
fvp_pwrc_write_ppoffr(read_mpidr_el1());
+
+#if PSCI_OS_INIT_MODE
+ return PSCI_E_SUCCESS;
+#else
+ return;
+#endif
}
/*******************************************************************************
#define PLAT_MAX_PWR_LVL ARM_PWR_LVL2
+#if PSCI_OS_INIT_MODE
+#define PLAT_MAX_CPU_SUSPEND_PWR_LVL ARM_PWR_LVL1
+#endif
+
/*
* Other platform porting definitions are provided by included headers
*/
ifeq (${SPMC_AT_EL3}, 1)
PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_el3_spmc.c
endif
+
+PSCI_OS_INIT_MODE := 1
* search if the number of entries justify the additional complexity.
*/
for (i = 0; !!arm_pm_idle_states[i]; i++) {
+#if PSCI_OS_INIT_MODE
+ if ((power_state & ~ARM_LAST_AT_PLVL_MASK) ==
+ arm_pm_idle_states[i])
+#else
if (power_state == arm_pm_idle_states[i])
+#endif /* __PSCI_OS_INIT_MODE__ */
break;
}
state_id = psci_get_pstate_id(power_state);
/* Parse the State ID and populate the state info parameter */
- while (state_id) {
- req_state->pwr_domain_state[i++] = state_id &
+ for (i = ARM_PWR_LVL0; i <= PLAT_MAX_PWR_LVL; i++) {
+ req_state->pwr_domain_state[i] = state_id &
ARM_LOCAL_PSTATE_MASK;
state_id >>= ARM_LOCAL_PSTATE_WIDTH;
}
+#if PSCI_OS_INIT_MODE
+ req_state->last_at_pwrlvl = state_id & ARM_LOCAL_PSTATE_MASK;
+#endif /* __PSCI_OS_INIT_MODE__ */
return PSCI_E_SUCCESS;
}