net: bcmgenet: keep MAC in reset until PHY is up

As noted in commit 145555d2a457 ("net: bcmgenet: enable loopback
during UniMAC sw_reset") the UniMAC must be clocked at least 5
cycles while the sw_reset is asserted to ensure a clean reset.

That commit enabled local loopback to provide an Rx clock from the
GENET sourced Tx clk. However, when connected in MII mode the Tx
clk is sourced by the PHY so if an EPHY is not supplying clocks
(e.g. when the link is down) the UniMAC does not receive the
necessary clocks.

This commit extends the sw_reset window until the PHY reports that
the link is up thereby ensuring that the clocks are being provided
to the MAC to produce a clean reset.

One consequence is that if the system attempts to enter a Wake on
LAN suspend state when the PHY link has not been active the MAC
may not have had a chance to initialize cleanly. In this case, we
remove the sw_reset and enable the WoL reception path as normal
with the hope that the PHY will provide the necessary clocks to
drive the WoL blocks if the link becomes active after the system
has entered suspend.

Fixes: 83c070ed8c89 ("net: bcmgenet: add main driver file")
Signed-off-by: Doug Berger <opendmb@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.c b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
index c8ac2d83208fad2e582250e19becc4585a5bb9e8..ce64b4e47febe0518b9c26ad20e27b260e589fd6 100644 (file)
--- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
@@ -1965,6 +1965,8 @@ static void umac_enable_set(struct bcmgenet_priv *priv, u32 mask, bool enable)
        u32 reg;
 
        reg = bcmgenet_umac_readl(priv, UMAC_CMD);
+       if (reg & CMD_SW_RESET)
+               return;
        if (enable)
                reg |= mask;
        else
@@ -1984,13 +1986,9 @@ static void reset_umac(struct bcmgenet_priv *priv)
        bcmgenet_rbuf_ctrl_set(priv, 0);
        udelay(10);
 
-       /* disable MAC while updating its registers */
-       bcmgenet_umac_writel(priv, 0, UMAC_CMD);
-
-       /* issue soft reset with (rg)mii loopback to ensure a stable rxclk */
-       bcmgenet_umac_writel(priv, CMD_SW_RESET | CMD_LCL_LOOP_EN, UMAC_CMD);
+       /* issue soft reset and disable MAC while updating its registers */
+       bcmgenet_umac_writel(priv, CMD_SW_RESET, UMAC_CMD);
        udelay(2);
-       bcmgenet_umac_writel(priv, 0, UMAC_CMD);
 }
 
 static void bcmgenet_intr_disable(struct bcmgenet_priv *priv)

diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c b/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c
index ea20d94bd050050e9945c8de70f93da695b89d74..c9a43695b182cb5ed042c7a4c59d5785423f6264 100644 (file)
--- a/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c
@@ -132,8 +132,12 @@ int bcmgenet_wol_power_down_cfg(struct bcmgenet_priv *priv,
                return -EINVAL;
        }
 
-       /* disable RX */
+       /* Can't suspend with WoL if MAC is still in reset */
        reg = bcmgenet_umac_readl(priv, UMAC_CMD);
+       if (reg & CMD_SW_RESET)
+               reg &= ~CMD_SW_RESET;
+
+       /* disable RX */
        reg &= ~CMD_RX_EN;
        bcmgenet_umac_writel(priv, reg, UMAC_CMD);
        mdelay(10);

diff --git a/drivers/net/ethernet/broadcom/genet/bcmmii.c b/drivers/net/ethernet/broadcom/genet/bcmmii.c
index 69e80fb6e03968dd96012760d50dc141490c00d3..b5930f80039d20fda267319fe8d2ef50b66b32e0 100644 (file)
--- a/drivers/net/ethernet/broadcom/genet/bcmmii.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmmii.c
@@ -95,6 +95,12 @@ void bcmgenet_mii_setup(struct net_device *dev)
                               CMD_HD_EN |
                               CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE);
                reg |= cmd_bits;
+               if (reg & CMD_SW_RESET) {
+                       reg &= ~CMD_SW_RESET;
+                       bcmgenet_umac_writel(priv, reg, UMAC_CMD);
+                       udelay(2);
+                       reg |= CMD_TX_EN | CMD_RX_EN;
+               }
                bcmgenet_umac_writel(priv, reg, UMAC_CMD);
        } else {
                /* done if nothing has changed */