Input: applespi - fix occasional crc errors under load.

For some reason, when the system is under heavy CPU load, the read
following the write sometimes occurs unusually quickly, resulting in
the read data not being quite ready and hence a bad packet getting read.
Adding another delay after reading the status message appears to fix
this.

Signed-off-by: Ronald Tschalär <ronald@innovation.ch>
Link: https://lore.kernel.org/r/20210217190718.11035-2-ronald@innovation.ch
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>

diff --git a/drivers/input/keyboard/applespi.c b/drivers/input/keyboard/applespi.c
index 27e87c45edf25c3f53a2d6a04cb8bf4120a9d03c..eda1b23002b58de882c84c430f0c692b57c07fc1 100644 (file)
--- a/drivers/input/keyboard/applespi.c
+++ b/drivers/input/keyboard/applespi.c
@@ -749,6 +749,8 @@ static void applespi_async_write_complete(void *context)
                                         applespi->tx_status,
                                         APPLESPI_STATUS_SIZE);
 
+       udelay(SPI_RW_CHG_DELAY_US);
+
        if (!applespi_check_write_status(applespi, applespi->wr_m.status)) {
                /*
                 * If we got an error, we presumably won't get the expected