arm64: dts: zynqmp: Added GEM reset definitions

The Cadence GEM/MACB driver now utilizes the platform-level reset on the
ZynqMP platform. Add reset definitions to the ZynqMP platform device
tree to allow this to be used.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 74e66443e4cee994d94f8c69a453fe0163dfd57f..9bec3ba20c699006ab4e7e093e79cbccad99eba2 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -512,6 +512,8 @@
                        #stream-id-cells = <1>;
                        iommus = <&smmu 0x874>;
                        power-domains = <&zynqmp_firmware PD_ETH_0>;
+                       resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>;
+                       reset-names = "gem0_rst";
                };
 
                gem1: ethernet@ff0c0000 {
@@ -526,6 +528,8 @@
                        #stream-id-cells = <1>;
                        iommus = <&smmu 0x875>;
                        power-domains = <&zynqmp_firmware PD_ETH_1>;
+                       resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>;
+                       reset-names = "gem1_rst";
                };
 
                gem2: ethernet@ff0d0000 {
@@ -540,6 +544,8 @@
                        #stream-id-cells = <1>;
                        iommus = <&smmu 0x876>;
                        power-domains = <&zynqmp_firmware PD_ETH_2>;
+                       resets = <&zynqmp_reset ZYNQMP_RESET_GEM2>;
+                       reset-names = "gem2_rst";
                };
 
                gem3: ethernet@ff0e0000 {
@@ -554,6 +560,8 @@
                        #stream-id-cells = <1>;
                        iommus = <&smmu 0x877>;
                        power-domains = <&zynqmp_firmware PD_ETH_3>;
+                       resets = <&zynqmp_reset ZYNQMP_RESET_GEM3>;
+                       reset-names = "gem3_rst";
                };
 
                gpio: gpio@ff0a0000 {