drm/i915: Wait for eDP panel power cycle delay on reboot on all platforms

Extend the eDP panel power cycle delay wait on reboot handling
to cover all platforms. No reason to think that VLV/CHV are
in any way special since the documentation states that the
hardware power cycle delay goes back to its default value on
reset, and that may not be enough for all panels.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201001151640.14590-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index bbd5f04dc140f8f4056317504b63423b60220057..85fa36c56c8aa5850a2a452a8d45b4a63d752c6a 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -5187,6 +5187,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
        encoder->sync_state = intel_ddi_sync_state;
        encoder->initial_fastset_check = intel_ddi_initial_fastset_check;
        encoder->suspend = intel_dp_encoder_suspend;
+       encoder->shutdown = intel_dp_encoder_shutdown;
        encoder->get_power_domains = intel_ddi_get_power_domains;
 
        encoder->type = INTEL_OUTPUT_DDI;

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 852c78a3e4444bcff9cd8d375cf0b67526caa88a..329d129dec8fa217cfc3e957c5a64b73dc9e9aef 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6752,7 +6752,7 @@ void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder)
                edp_panel_vdd_off_sync(intel_dp);
 }
 
-static void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder)
+void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder)
 {
        struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder);
        intel_wakeref_t wakeref;
@@ -8098,8 +8098,7 @@ bool intel_dp_init(struct drm_i915_private *dev_priv,
        intel_encoder->initial_fastset_check = intel_dp_initial_fastset_check;
        intel_encoder->update_pipe = intel_panel_update_backlight;
        intel_encoder->suspend = intel_dp_encoder_suspend;
-       if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
-               intel_encoder->shutdown = intel_dp_encoder_shutdown;
+       intel_encoder->shutdown = intel_dp_encoder_shutdown;
        if (IS_CHERRYVIEW(dev_priv)) {
                intel_encoder->pre_pll_enable = chv_dp_pre_pll_enable;
                intel_encoder->pre_enable = chv_pre_enable_dp;

diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 6c201377fdc01b22cd4c2434ea724532eda997cf..426d4968e15c75e1e30a04e7d104c93ed62b752a 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -57,6 +57,7 @@ void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
                                           bool enable);
 void intel_dp_encoder_reset(struct drm_encoder *encoder);
 void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
+void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder);
 void intel_dp_encoder_flush_work(struct drm_encoder *encoder);
 int intel_dp_compute_config(struct intel_encoder *encoder,
                            struct intel_crtc_state *pipe_config,