unsigned int ver;
ver = ipc_mmio_get_cp_version(ipc_mmio);
- cp_cap = readl(ipc_mmio->base + ipc_mmio->offset.cp_capability);
+ cp_cap = ioread32(ipc_mmio->base + ipc_mmio->offset.cp_capability);
ipc_mmio->has_mux_lite = (ver >= IOSM_CP_VERSION) &&
!(cp_cap & DL_AGGR) && !(cp_cap & UL_AGGR);
if (!ipc_mmio)
return IPC_MEM_EXEC_STAGE_INVALID;
- return (enum ipc_mem_exec_stage)readl(ipc_mmio->base +
- ipc_mmio->offset.exec_stage);
+ return (enum ipc_mem_exec_stage)ioread32(ipc_mmio->base +
+ ipc_mmio->offset.exec_stage);
}
void ipc_mmio_copy_chip_info(struct iosm_mmio *ipc_mmio, void *dest,
if (!ipc_mmio)
return IPC_MEM_DEVICE_IPC_INVALID;
- return (enum ipc_mem_device_ipc_state)
- readl(ipc_mmio->base + ipc_mmio->offset.ipc_status);
+ return (enum ipc_mem_device_ipc_state)ioread32(ipc_mmio->base +
+ ipc_mmio->offset.ipc_status);
}
enum rom_exit_code ipc_mmio_get_rom_exit_code(struct iosm_mmio *ipc_mmio)
if (!ipc_mmio)
return IMEM_ROM_EXIT_FAIL;
- return (enum rom_exit_code)readl(ipc_mmio->base +
- ipc_mmio->offset.rom_exit_code);
+ return (enum rom_exit_code)ioread32(ipc_mmio->base +
+ ipc_mmio->offset.rom_exit_code);
}
void ipc_mmio_config(struct iosm_mmio *ipc_mmio)
return;
iowrite64(addr, ipc_mmio->base + ipc_mmio->offset.psi_address);
- writel(size, ipc_mmio->base + ipc_mmio->offset.psi_size);
+ iowrite32(size, ipc_mmio->base + ipc_mmio->offset.psi_size);
}
void ipc_mmio_set_contex_info_addr(struct iosm_mmio *ipc_mmio, phys_addr_t addr)
int ipc_mmio_get_cp_version(struct iosm_mmio *ipc_mmio)
{
- return ipc_mmio ? readl(ipc_mmio->base + ipc_mmio->offset.cp_version) :
- -EFAULT;
+ if (ipc_mmio)
+ return ioread32(ipc_mmio->base + ipc_mmio->offset.cp_version);
+
+ return -EFAULT;
}