]> git.baikalelectronics.ru Git - kernel.git/commitdiff
drm/msm/dpu: use struct dpu_hw_merge_3d in dpu_hw_pingpong
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Sat, 15 May 2021 19:09:08 +0000 (22:09 +0300)
committerRob Clark <robdclark@chromium.org>
Wed, 23 Jun 2021 14:33:54 +0000 (07:33 -0700)
Use struct dpu_hw_merge_3d pointer in struct dpu_hw_pingpong rather
than using struct dpu_hw_blk. This is the only user of dpu_hw_blk.id,
which will be cleaned in the next patch.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210515190909.1809050-4-dmitry.baryshkov@linaro.org
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c

index 391b13b99c01727817af757803268e2c7d0daa44..185379b185725837ed46eae32fe603627e2f4ec9 100644 (file)
@@ -285,7 +285,7 @@ static void dpu_encoder_phys_vid_setup_timing_engine(
        intf_cfg.stream_sel = 0; /* Don't care value for video mode */
        intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc);
        if (phys_enc->hw_pp->merge_3d)
-               intf_cfg.merge_3d = phys_enc->hw_pp->merge_3d->id;
+               intf_cfg.merge_3d = phys_enc->hw_pp->merge_3d->idx;
 
        spin_lock_irqsave(phys_enc->enc_spinlock, lock_flags);
        phys_enc->hw_intf->ops.setup_timing_gen(phys_enc->hw_intf,
@@ -299,11 +299,8 @@ static void dpu_encoder_phys_vid_setup_timing_engine(
                                true,
                                phys_enc->hw_pp->idx);
 
-       if (phys_enc->hw_pp->merge_3d) {
-               struct dpu_hw_merge_3d *merge_3d = to_dpu_hw_merge_3d(phys_enc->hw_pp->merge_3d);
-
-               merge_3d->ops.setup_3d_mode(merge_3d, intf_cfg.mode_3d);
-       }
+       if (phys_enc->hw_pp->merge_3d)
+               phys_enc->hw_pp->merge_3d->ops.setup_3d_mode(phys_enc->hw_pp->merge_3d, intf_cfg.mode_3d);
 
        spin_unlock_irqrestore(phys_enc->enc_spinlock, lock_flags);
 
@@ -448,7 +445,7 @@ static void dpu_encoder_phys_vid_enable(struct dpu_encoder_phys *phys_enc)
 
        ctl->ops.update_pending_flush_intf(ctl, phys_enc->hw_intf->idx);
        if (ctl->ops.update_pending_flush_merge_3d && phys_enc->hw_pp->merge_3d)
-               ctl->ops.update_pending_flush_merge_3d(ctl, phys_enc->hw_pp->merge_3d->id);
+               ctl->ops.update_pending_flush_merge_3d(ctl, phys_enc->hw_pp->merge_3d->idx);
 
 skip_flush:
        DPU_DEBUG_VIDENC(phys_enc,
index 845b9ce80e31904c7664d603002aa6bfdec1acfc..89d08a715c16d29654021e5ffd5502e63bd7e6dc 100644 (file)
@@ -126,6 +126,8 @@ struct dpu_hw_pingpong_ops {
                        struct dpu_hw_dither_cfg *cfg);
 };
 
+struct dpu_hw_merge_3d;
+
 struct dpu_hw_pingpong {
        struct dpu_hw_blk base;
        struct dpu_hw_blk_reg_map hw;
@@ -133,7 +135,7 @@ struct dpu_hw_pingpong {
        /* pingpong */
        enum dpu_pingpong idx;
        const struct dpu_pingpong_cfg *caps;
-       struct dpu_hw_blk *merge_3d;
+       struct dpu_hw_merge_3d *merge_3d;
 
        /* ops */
        struct dpu_hw_pingpong_ops ops;
index fd2d104f0a91d622e3311b5ce6170275cc95854e..c0eec12498e7571295bc70ad9647e63b7f8ba904 100644 (file)
@@ -162,7 +162,7 @@ int dpu_rm_init(struct dpu_rm *rm,
                        goto fail;
                }
                if (pp->merge_3d && pp->merge_3d < MERGE_3D_MAX)
-                       hw->merge_3d = rm->merge_3d_blks[pp->merge_3d - MERGE_3D_0];
+                       hw->merge_3d = to_dpu_hw_merge_3d(rm->merge_3d_blks[pp->merge_3d - MERGE_3D_0]);
                rm->pingpong_blks[pp->id - PINGPONG_0] = &hw->base;
        }