net: ipa: define BCR values using an enum

The backward compatibility register (BCR) has a set of bit flags
that indicate ways in which the IPA hardware should operate in a
backward compatible way.  The register is not supported starting
with IPA v4.5, and where it is supported, defined bits all have the
same numeric value.

Redefine these flags using an enumerated type, with each member's
value representing the bit position that encodes it in the BCR.
This replaces all of the single-bit field masks previously defined.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

diff --git a/drivers/net/ipa/data/ipa_data-v3.1.c b/drivers/net/ipa/data/ipa_data-v3.1.c
index 1c1895aea81180c94b8d52b7ced5149f42ceef93..e0d71f609272991cbfb6429834bdf4ea85f2db82 100644 (file)
--- a/drivers/net/ipa/data/ipa_data-v3.1.c
+++ b/drivers/net/ipa/data/ipa_data-v3.1.c
@@ -526,7 +526,7 @@ static const struct ipa_power_data ipa_power_data = {
 /* Configuration data for an SoC having IPA v3.1 */
 const struct ipa_data ipa_data_v3_1 = {
        .version        = IPA_VERSION_3_1,
-       .backward_compat = BCR_CMDQ_L_LACK_ONE_ENTRY_FMASK,
+       .backward_compat = BIT(BCR_CMDQ_L_LACK_ONE_ENTRY),
        .qsb_count      = ARRAY_SIZE(ipa_qsb_data),
        .qsb_data       = ipa_qsb_data,
        .endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data),

diff --git a/drivers/net/ipa/data/ipa_data-v3.5.1.c b/drivers/net/ipa/data/ipa_data-v3.5.1.c
index 58b708d2fc75da0ad7490758a2a6bfc21c21bff2..383ef18900654505bf83b361006fd97ef36dfc29 100644 (file)
--- a/drivers/net/ipa/data/ipa_data-v3.5.1.c
+++ b/drivers/net/ipa/data/ipa_data-v3.5.1.c
@@ -407,11 +407,11 @@ static const struct ipa_power_data ipa_power_data = {
 /* Configuration data for an SoC having IPA v3.5.1 */
 const struct ipa_data ipa_data_v3_5_1 = {
        .version        = IPA_VERSION_3_5_1,
-       .backward_compat = BCR_CMDQ_L_LACK_ONE_ENTRY_FMASK |
-                          BCR_TX_NOT_USING_BRESP_FMASK |
-                          BCR_SUSPEND_L2_IRQ_FMASK |
-                          BCR_HOLB_DROP_L2_IRQ_FMASK |
-                          BCR_DUAL_TX_FMASK,
+       .backward_compat = BIT(BCR_CMDQ_L_LACK_ONE_ENTRY) |
+                          BIT(BCR_TX_NOT_USING_BRESP) |
+                          BIT(BCR_SUSPEND_L2_IRQ) |
+                          BIT(BCR_HOLB_DROP_L2_IRQ) |
+                          BIT(BCR_DUAL_TX),
        .qsb_count      = ARRAY_SIZE(ipa_qsb_data),
        .qsb_data       = ipa_qsb_data,
        .endpoint_count = ARRAY_SIZE(ipa_gsi_endpoint_data),

diff --git a/drivers/net/ipa/ipa_reg.h b/drivers/net/ipa/ipa_reg.h
index 3e24bddc682efb9c26ce71cc389fccce384fc7cc..2aa1d1dd0adf5374592f2e6514de70b75558d208 100644 (file)
--- a/drivers/net/ipa/ipa_reg.h
+++ b/drivers/net/ipa/ipa_reg.h
@@ -220,20 +220,18 @@ static inline u32 ipa_reg_state_aggr_active_offset(enum ipa_version version)
 
 /* The next register is not present for IPA v4.5+ */
 #define IPA_REG_BCR_OFFSET                             0x000001d0
-/* The next two fields are not present for IPA v4.2+ */
-#define BCR_CMDQ_L_LACK_ONE_ENTRY_FMASK                GENMASK(0, 0)
-#define BCR_TX_NOT_USING_BRESP_FMASK           GENMASK(1, 1)
-/* The next field is invalid for IPA v4.0+ */
-#define BCR_TX_SUSPEND_IRQ_ASSERT_ONCE_FMASK   GENMASK(2, 2)
-/* The next two fields are not present for IPA v4.2+ */
-#define BCR_SUSPEND_L2_IRQ_FMASK               GENMASK(3, 3)
-#define BCR_HOLB_DROP_L2_IRQ_FMASK             GENMASK(4, 4)
-/* The next five fields are present for IPA v3.5+ */
-#define BCR_DUAL_TX_FMASK                      GENMASK(5, 5)
-#define BCR_ENABLE_FILTER_DATA_CACHE_FMASK     GENMASK(6, 6)
-#define BCR_NOTIF_PRIORITY_OVER_ZLT_FMASK      GENMASK(7, 7)
-#define BCR_FILTER_PREFETCH_EN_FMASK           GENMASK(8, 8)
-#define BCR_ROUTER_PREFETCH_EN_FMASK           GENMASK(9, 9)
+enum ipa_bcr_compat {
+       BCR_CMDQ_L_LACK_ONE_ENTRY               = 0x0,  /* Not IPA v4.2+ */
+       BCR_TX_NOT_USING_BRESP                  = 0x1,  /* Not IPA v4.2+ */
+       BCR_TX_SUSPEND_IRQ_ASSERT_ONCE          = 0x2,  /* Not IPA v4.0+ */
+       BCR_SUSPEND_L2_IRQ                      = 0x3,  /* Not IPA v4.2+ */
+       BCR_HOLB_DROP_L2_IRQ                    = 0x4,  /* Not IPA v4.2+ */
+       BCR_DUAL_TX                             = 0x5,  /* IPA v3.5+ */
+       BCR_ENABLE_FILTER_DATA_CACHE            = 0x6,  /* IPA v3.5+ */
+       BCR_NOTIF_PRIORITY_OVER_ZLT             = 0x7,  /* IPA v3.5+ */
+       BCR_FILTER_PREFETCH_EN                  = 0x8,  /* IPA v3.5+ */
+       BCR_ROUTER_PREFETCH_EN                  = 0x9,  /* IPA v3.5+ */
+};
 
 /* The value of the next register must be a multiple of 8 (bottom 3 bits 0) */
 #define IPA_REG_LOCAL_PKT_PROC_CNTXT_OFFSET            0x000001e8