]> git.baikalelectronics.ru Git - kernel.git/commitdiff
drm/i915/dsc: make DSC source support helper generic
authorJani Nikula <jani.nikula@intel.com>
Tue, 10 Dec 2019 10:50:51 +0000 (12:50 +0200)
committerJani Nikula <jani.nikula@intel.com>
Wed, 11 Dec 2019 06:16:05 +0000 (08:16 +0200)
Move intel_dp_source_supports_dsc() from intel_dp.c as
intel_dsc_source_support() in intel_vdsc.c. The DSC source support is
more about DSC than about DP, and will be needed for DP independent
code.

Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/6c9f646090913290fb00efd46a4332421bf95930.1575974743.git.jani.nikula@intel.com
drivers/gpu/drm/i915/display/intel_dp.c
drivers/gpu/drm/i915/display/intel_vdsc.c
drivers/gpu/drm/i915/display/intel_vdsc.h

index 0d98ba7e98c020793a5878d49508717867553f34..fe31bbfd6c62f56cbfe880ed2bf68169fe652d64 100644 (file)
@@ -1889,32 +1889,15 @@ static bool intel_dp_supports_fec(struct intel_dp *intel_dp,
                drm_dp_sink_supports_fec(intel_dp->fec_capable);
 }
 
-static bool intel_dp_source_supports_dsc(struct intel_dp *intel_dp,
-                                        const struct intel_crtc_state *pipe_config)
-{
-       struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
-
-       if (!INTEL_INFO(dev_priv)->display.has_dsc)
-               return false;
-
-       /* On TGL, DSC is supported on all Pipes */
-       if (INTEL_GEN(dev_priv) >= 12)
-               return true;
-
-       if (INTEL_GEN(dev_priv) >= 10 &&
-           pipe_config->cpu_transcoder != TRANSCODER_A)
-               return true;
-
-       return false;
-}
-
 static bool intel_dp_supports_dsc(struct intel_dp *intel_dp,
-                                 const struct intel_crtc_state *pipe_config)
+                                 const struct intel_crtc_state *crtc_state)
 {
-       if (!intel_dp_is_edp(intel_dp) && !pipe_config->fec_enable)
+       struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+
+       if (!intel_dp_is_edp(intel_dp) && !crtc_state->fec_enable)
                return false;
 
-       return intel_dp_source_supports_dsc(intel_dp, pipe_config) &&
+       return intel_dsc_source_support(encoder, crtc_state) &&
                drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd);
 }
 
index 7bd727129a8f84377b317fa3380fda2f4e6d9f53..a1b0f7cf1a96a4c86405ac57cccc7c22d78622a0 100644 (file)
@@ -334,6 +334,25 @@ static const struct rc_parameters *get_rc_params(u16 compressed_bpp,
        return &rc_parameters[row_index][column_index];
 }
 
+bool intel_dsc_source_support(struct intel_encoder *encoder,
+                             const struct intel_crtc_state *crtc_state)
+{
+       struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+       if (!INTEL_INFO(i915)->display.has_dsc)
+               return false;
+
+       /* On TGL, DSC is supported on all Pipes */
+       if (INTEL_GEN(i915) >= 12)
+               return true;
+
+       if (INTEL_GEN(i915) >= 10 &&
+           crtc_state->cpu_transcoder != TRANSCODER_A)
+               return true;
+
+       return false;
+}
+
 int intel_dsc_compute_params(struct intel_encoder *encoder,
                             struct intel_crtc_state *pipe_config)
 {
index 4ed2256750c3c088aa80b928679d3e5253500f09..88c6c17903c1558ce0dee61372960fe738d16ef4 100644 (file)
@@ -6,9 +6,13 @@
 #ifndef __INTEL_VDSC_H__
 #define __INTEL_VDSC_H__
 
+#include <linux/types.h>
+
 struct intel_encoder;
 struct intel_crtc_state;
 
+bool intel_dsc_source_support(struct intel_encoder *encoder,
+                             const struct intel_crtc_state *crtc_state);
 void intel_dsc_enable(struct intel_encoder *encoder,
                      const struct intel_crtc_state *crtc_state);
 void intel_dsc_disable(const struct intel_crtc_state *crtc_state);