drm/msm/a6xx: Remove unwanted regulator code

The GMU code currently has some misguided code to try to work around
a hardware quirk that requires the power domains on the GPU be
collapsed in a certain order. Upcoming patches will do this the
right way so get rid of the unused and unwanted regulator
code.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
index a12aa4664c8b77ec760756c9e612dff0f130035e..4618438886df375b40eb2b3af8043e5f456a4cda 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
@@ -681,9 +681,6 @@ int a6xx_gmu_reset(struct a6xx_gpu *a6xx_gpu)
        gmu_poll_timeout(gmu, REG_A6XX_RSCC_TCS3_DRV0_STATUS, val,
                (val & 1), 100, 1000);
 
-       /* Force off the GX GSDC */
-       regulator_force_disable(gmu->gx);
-
        /* Disable the resources */
        clk_bulk_disable_unprepare(gmu->nr_clocks, gmu->clocks);
        pm_runtime_put_sync(gmu->dev);
@@ -1218,7 +1215,6 @@ int a6xx_gmu_probe(struct a6xx_gpu *a6xx_gpu, struct device_node *node)
        gmu->idle_level = GMU_IDLE_STATE_ACTIVE;
 
        pm_runtime_enable(gmu->dev);
-       gmu->gx = devm_regulator_get(gmu->dev, "vdd");
 
        /* Get the list of clocks */
        ret = a6xx_gmu_clocks_probe(gmu);

diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.h b/drivers/gpu/drm/msm/adreno/a6xx_gmu.h
index c721d9165d8ec61a4ba0efd833de3bc67b74d40d..8081083cd062552928eea2060cf8b4dca153864a 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.h
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.h
@@ -52,8 +52,6 @@ struct a6xx_gmu {
        int hfi_irq;
        int gmu_irq;
 
-       struct regulator *gx;
-
        struct iommu_domain *domain;
        u64 uncached_iova_base;