powerpc/pseries/iommu: Print ibm,query-pe-dma-windows parameters

PowerVM has a stricter policy about allocating TCEs for LPARs and
often there is not enough TCEs for 1:1 mapping, this adds the supported
numbers into dev_info() to help analyzing bugreports.

Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220601040117.1467710-1-aik@ozlabs.ru

diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index fba64304e85973b9b8e508b6093530eecae3274c..2fb10ef6dee8a320d14929d4571e50d40c59a0c5 100644 (file)
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -1021,9 +1021,6 @@ static int query_ddw(struct pci_dev *dev, const u32 *ddw_avail,
 
        ret = rtas_call(ddw_avail[DDW_QUERY_PE_DMA_WIN], 3, out_sz, query_out,
                        cfg_addr, BUID_HI(buid), BUID_LO(buid));
-       dev_info(&dev->dev, "ibm,query-pe-dma-windows(%x) %x %x %x returned %d\n",
-                ddw_avail[DDW_QUERY_PE_DMA_WIN], cfg_addr, BUID_HI(buid),
-                BUID_LO(buid), ret);
 
        switch (out_sz) {
        case 5:
@@ -1041,6 +1038,11 @@ static int query_ddw(struct pci_dev *dev, const u32 *ddw_avail,
                break;
        }
 
+       dev_info(&dev->dev, "ibm,query-pe-dma-windows(%x) %x %x %x returned %d, lb=%llx ps=%x wn=%d\n",
+                ddw_avail[DDW_QUERY_PE_DMA_WIN], cfg_addr, BUID_HI(buid),
+                BUID_LO(buid), ret, query->largest_available_block,
+                query->page_size, query->windows_available);
+
        return ret;
 }