]> git.baikalelectronics.ru Git - kernel.git/commitdiff
drm/amdkfd: Use a systematic method to calculate queue mask bit
authorYong Zhao <Yong.Zhao@amd.com>
Wed, 4 Mar 2020 21:52:41 +0000 (16:52 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 1 May 2020 19:19:08 +0000 (15:19 -0400)
The queue mask used for set_resources always assumes the queue number
per pipe is 8, so KFD needs to align with that by using function
amdgpu_queue_mask_bit_to_set_resource_bit().

Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

index a501026e829cb74d08b6535d064c663bd1de9217..3f2b695cf19e2a2b8e55b29205e666f79394854b 100644 (file)
@@ -149,6 +149,9 @@ int amdgpu_amdkfd_post_reset(struct amdgpu_device *adev);
 
 void amdgpu_amdkfd_gpu_reset(struct kgd_dev *kgd);
 
+int amdgpu_queue_mask_bit_to_set_resource_bit(struct amdgpu_device *adev,
+                                       int queue_bit);
+
 /* Shared API */
 int amdgpu_amdkfd_alloc_gtt_mem(struct kgd_dev *kgd, size_t size,
                                void **mem_obj, uint64_t *gpu_addr,
index ae954779181303f0131a60a771e10b9b4626e33c..e9c4867abeffba32f3034d06e41a57a5709227dd 100644 (file)
@@ -1089,7 +1089,9 @@ static int set_sched_resources(struct device_queue_manager *dqm)
                        break;
                }
 
-               res.queue_mask |= (1ull << i);
+               res.queue_mask |= 1ull
+                       << amdgpu_queue_mask_bit_to_set_resource_bit(
+                               (struct amdgpu_device *)dqm->dev->kgd, i);
        }
        res.gws_mask = ~0ull;
        res.oac_mask = res.gds_heap_base = res.gds_heap_size = 0;