drm/i915: remove explicit CNL handling from intel_pm.c

Remove support for CNL as it's highly untested, probably broken, and
there is no real platform that requires this code. This is part of CNL
removal from i915.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210728215946.1573015-18-lucas.demarchi@intel.com

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index cb757a2acd386f9dfb1f2a2e75ab7d6b4842066c..11a30b1ac030a139d7709e2d88893ab51a138917 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8296,7 +8296,7 @@ enum {
 
 #define GEN8_CHICKEN_DCPR_1            _MMIO(0x46430)
 #define   SKL_SELECT_ALTERNATE_DC_EXIT (1 << 30)
-#define   CNL_DELAY_PMRSP              (1 << 22)
+#define   ICL_DELAY_PMRSP              (1 << 22)
 #define   MASK_WAKEMEM                 (1 << 13)
 #define   CNL_DDI_CLOCK_REG_ACCESS_ON  (1 << 7)
 

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 10a39a7d81501c77ee0f3c6a5295de553fc9c547..197169f012260551b867d248ce09d6fa29e5f209 100644 (file)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7469,7 +7469,7 @@ static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
 
        /*Wa_14010594013:icl, ehl */
        intel_uncore_rmw(&dev_priv->uncore, GEN8_CHICKEN_DCPR_1,
-                        0, CNL_DELAY_PMRSP);
+                        0, ICL_DELAY_PMRSP);
 }
 
 static void gen12lp_init_clock_gating(struct drm_i915_private *dev_priv)
@@ -7521,43 +7521,6 @@ static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)
                   CNP_PWM_CGE_GATING_DISABLE);
 }
 
-static void cnl_init_clock_gating(struct drm_i915_private *dev_priv)
-{
-       u32 val;
-       cnp_init_clock_gating(dev_priv);
-
-       /* This is not an Wa. Enable for better image quality */
-       intel_uncore_write(&dev_priv->uncore, _3D_CHICKEN3,
-                  _MASKED_BIT_ENABLE(_3D_CHICKEN3_AA_LINE_QUALITY_FIX_ENABLE));
-
-       /* WaEnableChickenDCPR:cnl */
-       intel_uncore_write(&dev_priv->uncore, GEN8_CHICKEN_DCPR_1,
-                  intel_uncore_read(&dev_priv->uncore, GEN8_CHICKEN_DCPR_1) | MASK_WAKEMEM);
-
-       /*
-        * WaFbcWakeMemOn:cnl
-        * Display WA #0859: cnl
-        */
-       intel_uncore_write(&dev_priv->uncore, DISP_ARB_CTL, intel_uncore_read(&dev_priv->uncore, DISP_ARB_CTL) |
-                  DISP_FBC_MEMORY_WAKE);
-
-       val = intel_uncore_read(&dev_priv->uncore, SLICE_UNIT_LEVEL_CLKGATE);
-       /* ReadHitWriteOnlyDisable:cnl */
-       val |= RCCUNIT_CLKGATE_DIS;
-       intel_uncore_write(&dev_priv->uncore, SLICE_UNIT_LEVEL_CLKGATE, val);
-
-       /* Wa_2201832410:cnl */
-       val = intel_uncore_read(&dev_priv->uncore, SUBSLICE_UNIT_LEVEL_CLKGATE);
-       val |= GWUNIT_CLKGATE_DIS;
-       intel_uncore_write(&dev_priv->uncore, SUBSLICE_UNIT_LEVEL_CLKGATE, val);
-
-       /* WaDisableVFclkgate:cnl */
-       /* WaVFUnitClockGatingDisable:cnl */
-       val = intel_uncore_read(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE);
-       val |= VFUNIT_CLKGATE_DIS;
-       intel_uncore_write(&dev_priv->uncore, UNSLICE_UNIT_LEVEL_CLKGATE, val);
-}
-
 static void cfl_init_clock_gating(struct drm_i915_private *dev_priv)
 {
        cnp_init_clock_gating(dev_priv);
@@ -7986,8 +7949,6 @@ void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
                dev_priv->display.init_clock_gating = gen12lp_init_clock_gating;
        else if (GRAPHICS_VER(dev_priv) == 11)
                dev_priv->display.init_clock_gating = icl_init_clock_gating;
-       else if (IS_CANNONLAKE(dev_priv))
-               dev_priv->display.init_clock_gating = cnl_init_clock_gating;
        else if (IS_COFFEELAKE(dev_priv) || IS_COMETLAKE(dev_priv))
                dev_priv->display.init_clock_gating = cfl_init_clock_gating;
        else if (IS_SKYLAKE(dev_priv))