irqchip/gic-v4.1: Fix programming of GICR_VPROPBASER_4_1_SIZE

The Size field of GICv4.1 VPROPBASER register indicates number of
pages minus one and together Page_Size and Size control the vPEID
width. Let's respect this requirement of the architecture.

Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200206075711.1275-2-yuzenghui@huawei.com

diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index e5a25d97f8dbeed2b0646fae1261f37174441d63..992bc72cab6f81b9aa4651867145299b3691ae50 100644 (file)
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -2531,7 +2531,7 @@ static int allocate_vpe_l1_table(void)
                npg = 1;
        }
 
-       val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg);
+       val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg - 1);
 
        /* Right, that's the number of CPU pages we need for L1 */
        np = DIV_ROUND_UP(npg * psz, PAGE_SIZE);