Pull mailbox updates from Jassi Brar:
- imx: add support for i.MX8ULP
- mtk: code change around callback struct
- qcom: add sm6125, MSM8939 fix for channel exhaustion
- microchip: add support for polarfire controller
- misc: cosmetic changes to bcm-2835,flexrm,pdc, arm-mhu and hisilicon
* tag 'mailbox-v5.14' of git://git.linaro.org/landing-teams/working/fujitsu/integration: (26 commits)
MAINTAINERS: add entry for polarfire soc mailbox
dt-bindings: add bindings for polarfire soc system controller
mbox: add polarfire soc system controller mailbox
dt-bindings: add bindings for polarfire soc mailbox
mailbox: imx: Avoid using val uninitialized in imx_mu_isr()
mailbox: qcom: Add MSM8939 APCS support
mailbox: qcom: Use PLATFORM_DEVID_AUTO to register platform device
dt-bindings: mailbox: qcom: Add MSM8939 APCS compatible
mailbox: qcom-apcs: Add SM6125 compatible
dt-bindings: mailbox: Add binding for sm6125
mailbox: mtk-cmdq: Fix uninitialized variable in cmdq_mbox_flush()
mailbox: bcm-flexrm-mailbox: Remove redundant dev_err call in flexrm_mbox_probe()
mailbox: bcm2835: Remove redundant dev_err call in bcm2835_mbox_probe()
mailbox: qcom-ipcc: Fix IPCC mbox channel exhaustion
mailbox: mtk-cmdq: Add struct cmdq_pkt in struct cmdq_cb_data
mailbox: mtk-cmdq: Use mailbox rx_callback
mailbox: mtk-cmdq: Remove cmdq_cb_status
mailbox: imx-mailbox: support i.MX8ULP MU
mailbox: imx: add xSR/xCR register array
mailbox: imx: replace the xTR/xRR array with single register
...