]> git.baikalelectronics.ru Git - arm-tf.git/commitdiff
zynqmp : pm : Adds new zynqmp-pm api SMC call for register access
authorKalyani Akula <kalyania@xilinx.com>
Mon, 23 Nov 2020 06:42:10 +0000 (22:42 -0800)
committerManish Pandey <manish.pandey2@arm.com>
Mon, 4 Jan 2021 11:50:02 +0000 (11:50 +0000)
This patch adds new zynqmp-pm api to provide read/write access to
CSU or PMU global registers.

Signed-off-by: Kalyani Akula <kalyania@xilinx.com>
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: I4fd52eb732fc3e6a8bccd96cad7dc090b2161042

plat/xilinx/zynqmp/include/zynqmp_def.h
plat/xilinx/zynqmp/pm_service/pm_api_sys.c
plat/xilinx/zynqmp/pm_service/pm_api_sys.h
plat/xilinx/zynqmp/pm_service/pm_defs.h
plat/xilinx/zynqmp/pm_service/pm_svc_main.c

index 461439530f7507002963f8c7a2f5da9e19b3fa21..b492210b00751ae23d838307f9144a280ed6bb71 100644 (file)
 #define  AFIFM6_WRCTRL         U(13)
 #define  FABRIC_WIDTH          U(3)
 
+/* CSUDMA Module Base Address*/
+#define CSUDMA_BASE            0xFFC80000
+
+/* RSA-CORE Module Base Address*/
+#define RSA_CORE_BASE          0xFFCE0000
+
 #endif /* ZYNQMP_DEF_H */
index 1ec06f9d00372761b3d8a6835de99caabdbe43c0..9a1f1b486c2fa320f1c726ce3b29b8bcee60a00e 100644 (file)
@@ -1546,3 +1546,48 @@ enum pm_ret_status pm_pll_get_mode(enum pm_node_id nid, enum pm_pll_mode *mode)
        PM_PACK_PAYLOAD2(payload, PM_PLL_GET_MODE, nid);
        return pm_ipi_send_sync(primary_proc, payload, mode, 1);
 }
+
+/**
+ * pm_register_access() -  PM API for register read/write access data
+ *
+ * @register_access_id Register_access_id which says register read/write
+ *
+ * @address            Address of the register to be accessed
+ *
+ * @mask               Mask value to be used while writing value
+ *
+ * @value              Value to be written to register
+ *
+ * @out                        Returned output data
+ *
+ * This function returns requested data.
+ *
+ * @return     Returns status, either success or error+reason
+ */
+enum pm_ret_status pm_register_access(unsigned int register_access_id,
+                                     unsigned int address,
+                                     unsigned int mask,
+                                     unsigned int value,
+                                     unsigned int *out)
+{
+       enum pm_ret_status ret;
+
+       if (((ZYNQMP_CSU_BASEADDR & address) != ZYNQMP_CSU_BASEADDR) &&
+                       ((CSUDMA_BASE & address) != CSUDMA_BASE) &&
+                       ((RSA_CORE_BASE & address) != RSA_CORE_BASE) &&
+                       ((PMU_GLOBAL_BASE & address) != PMU_GLOBAL_BASE))
+               return PM_RET_ERROR_ACCESS;
+
+       switch (register_access_id) {
+       case CONFIG_REG_WRITE:
+               ret = pm_mmio_write(address, mask, value);
+               break;
+       case CONFIG_REG_READ:
+               ret = pm_mmio_read(address, out);
+               break;
+       default:
+               ret = PM_RET_ERROR_ARGS;
+               WARN("Unimplemented register_access call\n\r");
+       }
+       return ret;
+}
index 930e4702f516fbb8e1dc78a0dfccb57c3ea75543..60fc303fe707a77335f26d892d2493b1fba3c363 100644 (file)
@@ -28,6 +28,11 @@ enum pm_query_id {
        PM_QID_CLOCK_GET_MAX_DIVISOR,
 };
 
+enum pm_register_access_id {
+       CONFIG_REG_WRITE,
+       CONFIG_REG_READ,
+};
+
 /**********************************************************
  * System-level API function declarations
  **********************************************************/
@@ -175,6 +180,11 @@ enum pm_ret_status pm_fpga_read(uint32_t reg_numframes,
 enum pm_ret_status pm_aes_engine(uint32_t address_high,
                                 uint32_t address_low,
                                 uint32_t  *value);
+enum pm_ret_status pm_register_access(unsigned int register_access_id,
+                                     unsigned int address,
+                                     unsigned int mask,
+                                     unsigned int value,
+                                     unsigned int *out);
 
 enum pm_ret_status pm_pll_set_parameter(enum pm_node_id nid,
                                enum pm_pll_param param_id,
index 4776d424bca7331516080e57d509e5a3b4dd189e..8b28807b7ea2414754296d331487f2fbf7ee346a 100644 (file)
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -97,6 +97,8 @@ enum pm_api_id {
        PM_PLL_GET_PARAMETER,
        PM_PLL_SET_MODE,
        PM_PLL_GET_MODE,
+       /* PM Register Access API */
+       PM_REGISTER_ACCESS,
        PM_API_MAX
 };
 
index 14321ec7798fccadd469521a49a5ef07e58e07a3..bf608dbd3d9fc0e8c7397f9d93656266be7d7778 100644 (file)
@@ -606,6 +606,15 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3,
                SMC_RET1(handle, (uint64_t)ret | ((uint64_t)mode << 32));
        }
 
+       case PM_REGISTER_ACCESS:
+       {
+               uint32_t value;
+
+               ret = pm_register_access(pm_arg[0], pm_arg[1], pm_arg[2],
+                                        pm_arg[3], &value);
+               SMC_RET1(handle, (uint64_t)ret | ((uint64_t)value) << 32);
+       }
+
        default:
                WARN("Unimplemented PM Service Call: 0x%x\n", smc_fid);
                SMC_RET1(handle, SMC_UNK);