((adev)->powerplay.pp_funcs->set_clockgating_by_smu(\
(adev)->powerplay.pp_handle, msg_id))
+#define amdgpu_dpm_notify_smu_memory_info(adev, virtual_addr_low, \
+ virtual_addr_hi, mc_addr_low, mc_addr_hi, size) \
+ ((adev)->powerplay.pp_funcs->notify_smu_memory_info)( \
+ (adev)->powerplay.pp_handle, virtual_addr_low, \
+ virtual_addr_hi, mc_addr_low, mc_addr_hi, size)
+
struct amdgpu_dpm {
struct amdgpu_ps *ps;
/* number of valid power states */
int (*load_firmware)(void *handle);
int (*wait_for_fw_loading_complete)(void *handle);
int (*set_clockgating_by_smu)(void *handle, uint32_t msg_id);
+ int (*notify_smu_memory_info)(void *handle, uint32_t virtual_addr_low,
+ uint32_t virtual_addr_hi,
+ uint32_t mc_addr_low,
+ uint32_t mc_addr_hi,
+ uint32_t size);
/* export to DC */
u32 (*get_sclk)(void *handle, bool low);
u32 (*get_mclk)(void *handle, bool low);