]> git.baikalelectronics.ru Git - kernel.git/commitdiff
mmc: sdhci-msm: Don't enable PWRSAVE_DLL for certain sdhc hosts
authorRitesh Harjani <riteshh@codeaurora.org>
Fri, 7 Feb 2020 12:04:28 +0000 (17:34 +0530)
committerUlf Hansson <ulf.hansson@linaro.org>
Tue, 24 Mar 2020 13:35:39 +0000 (14:35 +0100)
SDHC core with new 14lpp and later tech DLL should not enable
PWRSAVE_DLL since such controller's internal gating cannot meet
following MCLK requirement:
When MCLK is gated OFF, it is not gated for less than 0.5us and MCLK
must be switched on for at-least 1us before DATA starts coming.

Adding support for this requirement.

Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Reviewed-by: Can Guo <cang@codeaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1581077075-26011-1-git-send-email-vbadigan@codeaurora.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci-msm.c

index 3955fa5db43c69f60b50a8abbcfcb90e43313f7e..53b79ee37fdd85b2b90f7ee5952def274955e825 100644 (file)
@@ -977,9 +977,21 @@ static int sdhci_msm_cm_dll_sdc4_calibration(struct sdhci_host *host)
                goto out;
        }
 
-       config = readl_relaxed(host->ioaddr + msm_offset->core_vendor_spec3);
-       config |= CORE_PWRSAVE_DLL;
-       writel_relaxed(config, host->ioaddr + msm_offset->core_vendor_spec3);
+       /*
+        * Set CORE_PWRSAVE_DLL bit in CORE_VENDOR_SPEC3.
+        * When MCLK is gated OFF, it is not gated for less than 0.5us
+        * and MCLK must be switched on for at-least 1us before DATA
+        * starts coming. Controllers with 14lpp and later tech DLL cannot
+        * guarantee above requirement. So PWRSAVE_DLL should not be
+        * turned on for host controllers using this DLL.
+        */
+       if (!msm_host->use_14lpp_dll_reset) {
+               config = readl_relaxed(host->ioaddr +
+                               msm_offset->core_vendor_spec3);
+               config |= CORE_PWRSAVE_DLL;
+               writel_relaxed(config, host->ioaddr +
+                               msm_offset->core_vendor_spec3);
+       }
 
        /*
         * Drain writebuffer to ensure above DLL calibration