ASoC: codecs: wsa-macro: setup soundwire clks correctly

For SoundWire Frame sync to be generated correctly we need both MCLK
and MCLKx2 (npl). Without pm runtime enabled these two clocks will remain on,
however after adding pm runtime support its possible that NPl clock could be
turned off even when SoundWire controller is active.

Fix this by enabling mclk and npl clk when SoundWire clks are enabled.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20220224111718.6264-8-srinivas.kandagatla@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/codecs/lpass-wsa-macro.c b/sound/soc/codecs/lpass-wsa-macro.c
index c7b08a2bc2348a95df409a5dcd9fc43e6a64528a..94b8e2c59c260f25d36f6a3cd237317642f92f36 100644 (file)
--- a/sound/soc/codecs/lpass-wsa-macro.c
+++ b/sound/soc/codecs/lpass-wsa-macro.c
@@ -2260,6 +2260,13 @@ static int wsa_swrm_clock(struct wsa_macro *wsa, bool enable)
        struct regmap *regmap = wsa->regmap;
 
        if (enable) {
+               int ret;
+
+               ret = clk_prepare_enable(wsa->mclk);
+               if (ret) {
+                       dev_err(wsa->dev, "failed to enable mclk\n");
+                       return ret;
+               }
                wsa_macro_mclk_enable(wsa, true);
 
                /* reset swr ip */
@@ -2284,6 +2291,7 @@ static int wsa_swrm_clock(struct wsa_macro *wsa, bool enable)
                regmap_update_bits(regmap, CDC_WSA_CLK_RST_CTRL_SWR_CONTROL,
                                   CDC_WSA_SWR_CLK_EN_MASK, 0);
                wsa_macro_mclk_enable(wsa, false);
+               clk_disable_unprepare(wsa->mclk);
        }
 
        return 0;
@@ -2354,7 +2362,7 @@ static int wsa_macro_register_mclk_output(struct wsa_macro *wsa)
        struct clk_init_data init;
        int ret;
 
-       parent_clk_name = __clk_get_name(wsa->mclk);
+       parent_clk_name = __clk_get_name(wsa->npl);
 
        init.name = clk_name;
        init.ops = &swclk_gate_ops;