]> git.baikalelectronics.ru Git - kernel.git/commitdiff
ixgbe: fix pci device refcount leak
authorYang Yingliang <yangyingliang@huawei.com>
Tue, 29 Nov 2022 01:57:48 +0000 (09:57 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 18 Jan 2023 10:42:02 +0000 (11:42 +0100)
commit b93fb4405fcb5112c5739c5349afb52ec7f15c07 upstream.

As the comment of pci_get_domain_bus_and_slot() says, it
returns a PCI device with refcount incremented, when finish
using it, the caller must decrement the reference count by
calling pci_dev_put().

In ixgbe_get_first_secondary_devfn() and ixgbe_x550em_a_has_mii(),
pci_dev_put() is called to avoid leak.

Fixes: 684a96d07ffc ("ixgbe: register a mdiobus")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c

index 2fb97967961c43893b2d06fef0df9bc476dda426..ba36be0c7eb4db6fb3dbfd98563552e45c1824cd 100644 (file)
@@ -851,9 +851,11 @@ static struct pci_dev *ixgbe_get_first_secondary_devfn(unsigned int devfn)
        rp_pdev = pci_get_domain_bus_and_slot(0, 0, devfn);
        if (rp_pdev && rp_pdev->subordinate) {
                bus = rp_pdev->subordinate->number;
+               pci_dev_put(rp_pdev);
                return pci_get_domain_bus_and_slot(0, bus, 0);
        }
 
+       pci_dev_put(rp_pdev);
        return NULL;
 }
 
@@ -870,6 +872,7 @@ static bool ixgbe_x550em_a_has_mii(struct ixgbe_hw *hw)
        struct ixgbe_adapter *adapter = hw->back;
        struct pci_dev *pdev = adapter->pdev;
        struct pci_dev *func0_pdev;
+       bool has_mii = false;
 
        /* For the C3000 family of SoCs (x550em_a) the internal ixgbe devices
         * are always downstream of root ports @ 0000:00:16.0 & 0000:00:17.0
@@ -880,15 +883,16 @@ static bool ixgbe_x550em_a_has_mii(struct ixgbe_hw *hw)
        func0_pdev = ixgbe_get_first_secondary_devfn(PCI_DEVFN(0x16, 0));
        if (func0_pdev) {
                if (func0_pdev == pdev)
-                       return true;
-               else
-                       return false;
+                       has_mii = true;
+               goto out;
        }
        func0_pdev = ixgbe_get_first_secondary_devfn(PCI_DEVFN(0x17, 0));
        if (func0_pdev == pdev)
-               return true;
+               has_mii = true;
 
-       return false;
+out:
+       pci_dev_put(func0_pdev);
+       return has_mii;
 }
 
 /**