If you have Amba PrimeCell PL011 UARTs, set this variable to
the clock speed of the UARTs.
- CONFIG_PL01x_PORTS
+ CFG_PL01x_PORTS
If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
define this to a list of base addresses for each (supported)
#ifndef CONFIG_DM_SERIAL
-static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
+static volatile unsigned char *const port[] = CFG_PL01x_PORTS;
static enum pl01x_type pl01x_type __section(".data");
static struct pl01x_regs *base_regs __section(".data");
#define NUM_PORTS (sizeof(port)/sizeof(port[0]))
#define CFG_SYS_SERIAL2 0x21e0000
#define CFG_SYS_SERIAL3 0x21f0000
/*below might needs to be removed*/
-#define CONFIG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \
+#define CFG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \
(void *)CFG_SYS_SERIAL1, \
(void *)CFG_SYS_SERIAL2, \
(void *)CFG_SYS_SERIAL3 }
* Conflicts with AUART driver which can be set by board.
*/
#define CFG_PL011_CLOCK 24000000
-#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
+#define CFG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
/* Default baudrate can be overridden by board! */
/* NAND */
* serial console configuration
*/
#define CFG_PL011_CLOCK 50000000
-#define CONFIG_PL01x_PORTS {(void *)PHY_BASEADDR_UART0, \
+#define CFG_PL01x_PORTS {(void *)PHY_BASEADDR_UART0, \
(void *)PHY_BASEADDR_UART1, \
(void *)PHY_BASEADDR_UART2, \
(void *)PHY_BASEADDR_UART3}
/* Serial (pl011) */
#define UART_CLK (62500000)
#define CFG_PL011_CLOCK UART_CLK
-#define CONFIG_PL01x_PORTS {(void *)(0x2a400000)}
+#define CFG_PL01x_PORTS {(void *)(0x2a400000)}
/* Support MTD */
#define CFG_SYS_FLASH_BASE (0x08000000)
/* PL011 Serial Configuration */
#define CFG_PL011_CLOCK 24000000
-#define CONFIG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \
+#define CFG_PL01x_PORTS {(void *)CFG_SYS_SERIAL0, \
(void *)CFG_SYS_SERIAL1}
#define CFG_SYS_SERIAL0 V2M_UART0