#ifdef CONFIG_IMX8MM
#define USDHC3_BASE_ADDR 0x30B60000
#endif
+#define UART_BASE_ADDR(n) ( \
+ !!sizeof(struct { \
+ static_assert((n) >= 1 && (n) <= 4); \
+ int pad; \
+ }) * ( \
+ (n) == 1 ? UART1_BASE_ADDR : \
+ (n) == 2 ? UART2_BASE_ADDR : \
+ (n) == 3 ? UART3_BASE_ADDR : \
+ UART4_BASE_ADDR) \
+ )
#define TZASC_BASE_ADDR 0x32F80000
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
-#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 2048
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
-#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 2048
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
-#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 2048
#define CONFIG_SYS_BOOTM_LEN SZ_256M
/* UART */
-#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 2048
#define CONFIG_SYS_BOOTM_LEN SZ_256M
/* UART */
-#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE SZ_2K
#define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */
#endif
-#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 2048
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
-#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 2048
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE SZ_1G /* 1GB DDR */
-#define CONFIG_MXC_UART_BASE UART4_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(4)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE SZ_2K
#define CONFIG_SYS_BOOTM_LEN SZ_256M
/* UART */
-#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE SZ_2K
#define PHYS_SDRAM_2 0x100000000
#define PHYS_SDRAM_2_SIZE 0xC0000000 /* 3 GB */
-#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 2048
#define PHYS_SDRAM_2_SIZE 0x80000000 /* 2 GB */
#endif
-#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 2048
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x40000000 /* 1 GB DDR */
-#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
-#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */
-#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* Board and environment settings */
-#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
#define CONFIG_HOSTNAME "kontron-mx8mm"
#ifdef CONFIG_USB_EHCI_HCD
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
-#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */
/* UART */
-#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE SZ_2K
#define PHYS_SDRAM_SIZE 0x80000000
/* UART */
-#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE SZ_2K
#define PHYS_SDRAM 0x40000000
#define PHYS_SDRAM_SIZE 0x80000000 /* 2 GiB DDR */
-#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024
#define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */
/* UART */
-#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE SZ_2K
#define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G)
/* UART */
-#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE SZ_2K