]> git.baikalelectronics.ru Git - arm-tf.git/commitdiff
refactor(amu): unify ENABLE_AMU and ENABLE_FEAT_AMUv1
authorAndre Przywara <andre.przywara@arm.com>
Tue, 21 Mar 2023 13:53:19 +0000 (13:53 +0000)
committerManish Pandey <manish.pandey2@arm.com>
Mon, 27 Mar 2023 18:36:00 +0000 (19:36 +0100)
So far we have the ENABLE_AMU build option to include AMU register
handling code for enabling and context switch. There is also an
ENABLE_FEAT_AMUv1 option, solely to protect the HAFGRTR_EL2 system
register handling. The latter needs some alignment with the new feature
scheme, but it conceptually overlaps with the ENABLE_AMU option.

Since there is no real need for two separate options, unify both into a
new ENABLE_FEAT_AMU name in a first step. This is mostly just renaming at
this point, a subsequent patch will make use of the new feature handling
scheme.

Change-Id: I97d8a55bdee2ed1e1509fa9f2b09fd0bdd82736e
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
26 files changed:
Makefile
bl31/bl31.mk
bl32/sp_min/sp_min.mk
common/feat_detect.c
docs/components/activity-monitors.rst
docs/getting_started/build-options.rst
include/arch/aarch64/arch_features.h
lib/cpus/aarch64/cortex_a75.S
lib/cpus/aarch64/cortex_a78.S
lib/cpus/aarch64/cortex_a78_ae.S
lib/cpus/aarch64/neoverse_n1.S
lib/cpus/aarch64/neoverse_n2.S
lib/cpus/aarch64/rainier.S
lib/el3_runtime/aarch32/context_mgmt.c
lib/el3_runtime/aarch64/context_mgmt.c
lib/extensions/amu/amu.mk
make_helpers/defaults.mk
plat/arm/board/arm_fpga/platform.mk
plat/arm/board/fvp/platform.mk
plat/arm/board/fvp_r/platform.mk
plat/arm/board/rdn2/platform.mk
plat/arm/board/rdv1/platform.mk
plat/arm/board/rdv1mc/platform.mk
plat/arm/board/tc/platform.mk
plat/mediatek/common/common_config.mk
plat/qti/msm8916/platform.mk

index ca97fc2f2effcf71b56c582a4d0e2d568611e263..cc2ac6faaf45927d1618c0669c77b29fb9b3d997 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1092,7 +1092,6 @@ $(eval $(call assert_booleans,\
         DISABLE_MTPMU \
         DYN_DISABLE_AUTH \
         EL3_EXCEPTION_HANDLING \
-        ENABLE_AMU \
         ENABLE_AMU_AUXILIARY_COUNTERS \
         ENABLE_AMU_FCONF \
         AMU_RESTRICT_COUNTERS \
@@ -1172,7 +1171,7 @@ $(eval $(call assert_numerics,\
         ENABLE_TRBE_FOR_NS \
         ENABLE_BTI \
         ENABLE_PAUTH \
-        ENABLE_FEAT_AMUv1 \
+        ENABLE_FEAT_AMU \
         ENABLE_FEAT_AMUv1p1 \
         ENABLE_FEAT_CSV2_2 \
         ENABLE_FEAT_DIT \
@@ -1229,7 +1228,7 @@ $(eval $(call add_defines,\
         CTX_INCLUDE_NEVE_REGS \
         DECRYPTION_SUPPORT_${DECRYPTION_SUPPORT} \
         DISABLE_MTPMU \
-        ENABLE_AMU \
+        ENABLE_FEAT_AMU \
         ENABLE_AMU_AUXILIARY_COUNTERS \
         ENABLE_AMU_FCONF \
         AMU_RESTRICT_COUNTERS \
@@ -1310,7 +1309,6 @@ $(eval $(call add_defines,\
         ENABLE_MPMM \
         ENABLE_MPMM_FCONF \
         ENABLE_FEAT_FGT \
-        ENABLE_FEAT_AMUv1 \
         ENABLE_FEAT_ECV \
         SIMICS_BUILD \
         ENABLE_FEAT_AMUv1p1 \
index 006843efd45994bee2fd5cedccb49478a4748177..bf907eaa56ed016dd5d948fd6de8c69b3053d3f5 100644 (file)
@@ -91,7 +91,7 @@ ifneq (${ENABLE_SPE_FOR_NS},0)
 BL31_SOURCES           +=      lib/extensions/spe/spe.c
 endif
 
-ifeq (${ENABLE_AMU},1)
+ifneq (${ENABLE_FEAT_AMU},0)
 BL31_SOURCES           +=      ${AMU_SOURCES}
 endif
 
index e85e2738c587f7c4e578993438ea3b5c42f0af5f..0e5c1420c61547b97d01dbca71274acb9bc839dd 100644 (file)
@@ -28,7 +28,7 @@ ifeq (${ENABLE_PMF}, 1)
 BL32_SOURCES           +=      lib/pmf/pmf_main.c
 endif
 
-ifeq (${ENABLE_AMU},1)
+ifneq (${ENABLE_FEAT_AMU},0)
 BL32_SOURCES           +=      ${AMU_SOURCES}
 endif
 
index 9218c07e115acff1fcac97ed0916c49a75a2141b..ba8c82c2cb2703cd08a8b16b5aa476ecd298cae8 100644 (file)
@@ -187,7 +187,7 @@ void detect_arch_features(void)
 
        /* v8.4 features */
        read_feat_dit();
-       check_feature(ENABLE_FEAT_AMUv1, read_feat_amu_id_field(),
+       check_feature(ENABLE_FEAT_AMU, read_feat_amu_id_field(),
                      "AMUv1", 1, 2);
        check_feature(ENABLE_MPAM_FOR_LOWER_ELS, read_feat_mpam_version(),
                      "MPAM", 1, 17);
index dd45c43538eed8a5e96fb39e345031a93f4d1e71..5c1c2c2c79f020ef5b8d5a6ee1ace5db6014829d 100644 (file)
@@ -6,9 +6,9 @@ extension. This extension describes the architecture for the Activity Monitor
 Unit (|AMU|), an optional non-invasive component for monitoring core events
 through a set of 64-bit counters.
 
-When the ``ENABLE_AMU=1`` build option is provided, Trusted Firmware-A sets up
-the |AMU| prior to its exit from EL3, and will save and restore architected
-|AMU| counters as necessary upon suspend and resume.
+When the ``ENABLE_FEAT_AMU=1`` build option is provided, Trusted Firmware-A
+sets up the |AMU| prior to its exit from EL3, and will save and restore
+architected |AMU| counters as necessary upon suspend and resume.
 
 .. _Activity Monitor Auxiliary Counters:
 
index 0540b6d2fc560988ad82b1f334ed6ba819a1d9d8..08c1ff68e96927c15cda7daa7f59bc668d7e2fb3 100644 (file)
@@ -230,11 +230,6 @@ Common build options
    payload. Please refer to the "Booting an EL3 payload" section for more
    details.
 
--  ``ENABLE_AMU``: Boolean option to enable Activity Monitor Unit extensions.
-   This is an optional architectural feature available on v8.4 onwards. Some
-   v8.2 implementations also implement an AMU and this option can be used to
-   enable this feature on those systems as well. Default is 0.
-
 -  ``ENABLE_AMU_AUXILIARY_COUNTERS``: Enables support for AMU auxiliary counters
    (also known as group 1 counters). These are implementation-defined counters,
    and as such require additional platform configuration. Default is 0.
@@ -261,13 +256,12 @@ Common build options
    builds, but this behaviour can be overridden in each platform's Makefile or
    in the build command line.
 
--  ``ENABLE_FEAT_AMUv1``: Numeric value to enable access to the HAFGRTR_EL2
-   (Hypervisor Activity Monitors Fine-Grained Read Trap Register) during EL2
-   to EL3 context save/restore operations. This flag can take the values 0 to 2,
-   to align with the ``FEATURE_DETECTION`` mechanism. It is an optional feature
-   available on v8.4 and onwards and must be set to either 1 or 2 alongside
-   ``ENABLE_FEAT_FGT``, to access the HAFGRTR_EL2 register.
-   Default value is ``0``.
+-  ``ENABLE_FEAT_AMU``: Numeric value to enable Activity Monitor Unit
+   extensions. This flag can take the values 0 to 2, to align with the
+   ``FEATURE_DETECTION`` mechanism. This is an optional architectural feature
+   available on v8.4 onwards. Some v8.2 implementations also implement an AMU
+   and this option can be used to enable this feature on those systems as well.
+   This flag can take the values 0 to 2, the default is 0.
 
 -  ``ENABLE_FEAT_AMUv1p1``: Numeric value to enable the ``FEAT_AMUv1p1``
    extension. ``FEAT_AMUv1p1`` is an optional feature available on Arm v8.6
index d3c626367907801112cb666731af3c4d54f792bc..f8278959718082f1c4825eb35d97f65d6ab1b836 100644 (file)
@@ -244,11 +244,11 @@ static unsigned int read_feat_amu_id_field(void)
 
 static inline bool is_feat_amu_supported(void)
 {
-       if (ENABLE_FEAT_AMUv1 == FEAT_STATE_DISABLED) {
+       if (ENABLE_FEAT_AMU == FEAT_STATE_DISABLED) {
                return false;
        }
 
-       if (ENABLE_FEAT_AMUv1 == FEAT_STATE_ALWAYS) {
+       if (ENABLE_FEAT_AMU == FEAT_STATE_ALWAYS) {
                return true;
        }
 
index d561be45ec50b70dac32ff6892ef3b78a11a42c4..e22c82898c09e196d154bb17acafff6d28aec6f2 100644 (file)
@@ -121,7 +121,7 @@ func cortex_a75_reset_func
        bl      errata_dsu_936184_wa
 #endif
 
-#if ENABLE_AMU
+#if ENABLE_FEAT_AMU
        /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */
        mrs     x0, actlr_el3
        orr     x0, x0, #CORTEX_A75_ACTLR_AMEN_BIT
index 421509d7331a6fda1229ceeba25fb38072b8ec4e..69d7ab04f8ebbb6edc2230e1cf50320da1e14807 100644 (file)
@@ -483,7 +483,7 @@ func cortex_a78_reset_func
        bl      errata_a78_2779479_wa
 #endif
 
-#if ENABLE_AMU
+#if ENABLE_FEAT_AMU
        /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */
        mrs     x0, actlr_el3
        bic     x0, x0, #CORTEX_A78_ACTLR_TAM_BIT
index 27adc381b402fc962848e7013f6db4220725437f..d56f83544edfe677de32f129129fafdababdb02e 100644 (file)
@@ -214,7 +214,7 @@ func cortex_a78_ae_reset_func
        bl      errata_a78_ae_2395408_wa
 #endif
 
-#if ENABLE_AMU
+#if ENABLE_FEAT_AMU
        /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */
        mrs     x0, actlr_el3
        bic     x0, x0, #CORTEX_A78_ACTLR_TAM_BIT
index ec62519f55f8f4719bc7db80d020a030a3da740a..827c0b0c7143a0cd2f5533a0dff30cdd1148d80e 100644 (file)
@@ -585,7 +585,7 @@ func neoverse_n1_reset_func
        bl      errata_n1_1946160_wa
 #endif
 
-#if ENABLE_AMU
+#if ENABLE_FEAT_AMU
        /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */
        mrs     x0, actlr_el3
        orr     x0, x0, #NEOVERSE_N1_ACTLR_AMEN_BIT
index dbf5941e308cf2f464eab5a68952c13b7b5132b3..60d322f7f6015802ccb52b67805c840a95245c58 100644 (file)
@@ -545,7 +545,7 @@ func neoverse_n2_reset_func
        bl      errata_n2_2388450_wa
 #endif
 
-#if ENABLE_AMU
+#if ENABLE_FEAT_AMU
        /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */
        mrs     x0, cptr_el3
        orr     x0, x0, #TAM_BIT
index 584ab9747be502b460a6fa9a382719b21bf1be40..3b7b8b27d9eb47da1db9ad991a1cf219ff56b136 100644 (file)
@@ -94,7 +94,7 @@ func rainier_reset_func
        bl      errata_n1_1868343_wa
 #endif
 
-#if ENABLE_AMU
+#if ENABLE_FEAT_AMU
        /* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */
        mrs     x0, actlr_el3
        orr     x0, x0, #RAINIER_ACTLR_AMEN_BIT
index e7a0e5871c8b3d001ca3d8dde9696732004589dd..f31ee5dde6d1751d89ee404c410cc5fffb0c0c89 100644 (file)
@@ -136,7 +136,7 @@ void cm_setup_context(cpu_context_t *ctx, const entry_point_info_t *ep)
 static void enable_extensions_nonsecure(bool el2_unused)
 {
 #if IMAGE_BL32
-#if ENABLE_AMU
+#if ENABLE_FEAT_AMU
        amu_enable(el2_unused);
 #endif
 
index 04b685f2d70778462d138562e8fe6b24ccc03373..bb6db9f4d540d0d80751db9241b816504cb42e4a 100644 (file)
@@ -485,7 +485,7 @@ static void manage_extensions_nonsecure(bool el2_unused, cpu_context_t *ctx)
                spe_enable(el2_unused);
        }
 
-#if ENABLE_AMU
+#if ENABLE_FEAT_AMU
        amu_enable(el2_unused, ctx);
 #endif
 
index 0d203cb1f96c623e5159b2842351488c86d8ab1c..868ab12542e0e6e3a1d67078487e8b694e8ec428 100644 (file)
@@ -10,8 +10,8 @@ AMU_SOURCES   :=      lib/extensions/amu/${ARCH}/amu.c \
                        lib/extensions/amu/${ARCH}/amu_helpers.S
 
 ifneq (${ENABLE_AMU_AUXILIARY_COUNTERS},0)
-        ifeq (${ENABLE_AMU},0)
-                $(error AMU auxiliary counter support (`ENABLE_AMU_AUXILIARY_COUNTERS`) requires AMU support (`ENABLE_AMU`))
+        ifeq (${ENABLE_FEAT_AMU},0)
+                $(error AMU auxiliary counter support (`ENABLE_AMU_AUXILIARY_COUNTERS`) requires AMU support (`ENABLE_FEAT_AMU`))
         endif
 endif
 
index b928fcf9879635e6e9653442caeb231693e789bc..ddf81e613d28ede61a76037d4f118c73ea6803ea 100644 (file)
@@ -133,9 +133,6 @@ ENABLE_BTI                  := 0
 # Use BRANCH_PROTECTION to enable PAUTH.
 ENABLE_PAUTH                   := 0
 
-# Flag to enable access to the HAFGRTR_EL2 register
-ENABLE_FEAT_AMUv1              := 0
-
 # Flag to enable AMUv1p1 extension.
 ENABLE_FEAT_AMUv1p1            := 0
 
@@ -367,7 +364,7 @@ endif
 # enabled at ELX.
 CTX_INCLUDE_MTE_REGS           := 0
 
-ENABLE_AMU                     := 0
+ENABLE_FEAT_AMU                        := 0
 ENABLE_AMU_AUXILIARY_COUNTERS  := 0
 ENABLE_AMU_FCONF               := 0
 AMU_RESTRICT_COUNTERS          := 0
index a14a0d8c06859cd49734252dd19899cbb275fe10..109bfbec9cc345150b109ff6dc36f336d65d9743 100644 (file)
@@ -33,7 +33,7 @@ $(eval $(call add_define,FPGA_PRELOADED_DTB_BASE))
 FPGA_PRELOADED_CMD_LINE := 0x1000
 $(eval $(call add_define,FPGA_PRELOADED_CMD_LINE))
 
-ENABLE_AMU             :=      1
+ENABLE_FEAT_AMU                :=      2
 
 # Treating this as a memory-constrained port for now
 USE_COHERENT_MEM       :=      0
index 1d96a2a636448b80c9ee0909a9b0945b85ebe964..0d254fb00fa490932dae5b284513ba7dd684c4f7 100644 (file)
@@ -319,12 +319,12 @@ $(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config,${FVP_HW_CONFIG}))
 endif
 
 # Enable Activity Monitor Unit extensions by default
-ENABLE_AMU                     :=      1
+ENABLE_FEAT_AMU                        :=      2
 
 # Enable dynamic mitigation support by default
 DYNAMIC_WORKAROUND_CVE_2018_3639       :=      1
 
-ifeq (${ENABLE_AMU},1)
+ifneq (${ENABLE_FEAT_AMU},0)
 BL31_SOURCES           +=      lib/cpus/aarch64/cpuamu.c               \
                                lib/cpus/aarch64/cpuamu_helpers.S
 
index 93b5cf246064ec02e3e7f14f0a190ad282a65b01..5dd28b95d87606c36a9915f68034f30b643b4ffc 100644 (file)
@@ -69,7 +69,7 @@ FVP_R_BL_COMMON_SOURCES               +=      drivers/delay_timer/generic_delay_timer.c
 endif
 
 # Enable Activity Monitor Unit extensions by default
-ENABLE_AMU                     :=      1
+ENABLE_FEAT_AMU                        :=      2
 
 ifneq (${ENABLE_STACK_PROTECTOR},0)
 FVP_R_BL_COMMON_SOURCES        +=      plat/arm/board/fvp_r/fvp_r_stack_protector.c
index b30e3fccd04ed7ca31d1edf45670b5ee0df37662..ca55036dd7a76c3410f2bd6ca51647305a0b9f70 100644 (file)
@@ -87,4 +87,4 @@ NT_FW_CONFIG          :=      ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
 $(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config))
 
 override CTX_INCLUDE_AARCH32_REGS      := 0
-override ENABLE_AMU                    := 1
+override ENABLE_FEAT_AMU               := 1
index 11f52127e8bc9ef12c04ecd1db0f1a3f469154fe..a5fba67178c639e60592e55e2b417dbd9c7c1f3c 100644 (file)
@@ -57,7 +57,7 @@ NT_FW_CONFIG          :=      ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
 $(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG}))
 
 override CTX_INCLUDE_AARCH32_REGS      := 0
-override ENABLE_AMU                    := 1
+override ENABLE_FEAT_AMU               := 1
 
 ifneq ($(CSS_SGI_PLATFORM_VARIANT),0)
  $(error "CSS_SGI_PLATFORM_VARIANT for RD-V1 should always be 0, \
index df0b09ae1a09477679773b9e291b9a66785a851d..92f7c101fce24766b0802c1f1192122eeb7cbaf4 100644 (file)
@@ -68,7 +68,7 @@ NT_FW_CONFIG          :=      ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
 $(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config,${NT_FW_CONFIG}))
 
 override CTX_INCLUDE_AARCH32_REGS      := 0
-override ENABLE_AMU                    := 1
+override ENABLE_FEAT_AMU               := 1
 
 ifneq ($(CSS_SGI_PLATFORM_VARIANT),0)
  $(error "CSS_SGI_PLATFORM_VARIANT for RD-V1-MC should always be 0, \
index 5f4148c1709edc4fcda2ccaeda0eccff16f7a9e0..c6a82deef8edb5345644865def796a4a4969bd80 100644 (file)
@@ -163,7 +163,7 @@ override CTX_INCLUDE_PAUTH_REGS     := 1
 
 override ENABLE_SPE_FOR_NS     := 0
 
-override ENABLE_AMU := 1
+override ENABLE_FEAT_AMU := 1
 override ENABLE_AMU_AUXILIARY_COUNTERS := 1
 override ENABLE_AMU_FCONF := 1
 
index 851eb2cc42008d17e432a5fb68fed27ab0616351..31a61e02030cfb024e3dd14729b2d1409b730391 100644 (file)
@@ -19,7 +19,7 @@ GIC_DEBUG := 0
 ENABLE_STACK_PROTECTOR := strong
 # AMU, Kernel will access amuserenr_el0 if PE supported
 # Firmware _must_ implement AMU support
-ENABLE_AMU := 1
+ENABLE_FEAT_AMU := 2
 VENDOR_EXTEND_PUBEVENT_ENABLE := 1
 
 # MTK define options
index 60fb25d412d441468a0ecb73cabb820169dec139..2baf2032ab5e5da0bff4314fc654eb4680beecf9 100644 (file)
@@ -43,7 +43,6 @@ SEPARATE_CODE_AND_RODATA      := 1
 WARMBOOT_ENABLE_DCACHE_EARLY   := 1
 
 # Disable features unsupported in ARMv8.0
-ENABLE_AMU                     := 0
 ENABLE_SPE_FOR_NS              := 0
 ENABLE_SVE_FOR_NS              := 0