arm: mvebu: ddr: Fix compilation warning

gcc 5.1 generates this new warning (for Armada 38x platforms):

drivers/ddr/marvell/a38x/ddr3_debug.c: In function 'hws_ddr3_tip_read_training_result':
drivers/ddr/marvell/a38x/ddr3_debug.c:177:40: warning: 'sizeof' on array
  function parameter 'result' will return size of 'enum hws_result (*)[1]' [-Wsizeof-array-argument]
  memcpy(result, training_result, sizeof(result));
                                        ^
drivers/ddr/marvell/a38x/ddr3_debug.c:171:31: note: declared here
  u32 dev_num, enum hws_result result[MAX_STAGE_LIMIT][MAX_INTERFACE_NUM])
                               ^

Since this functions is not referenced anywhere, lets just remove it.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>

diff --git a/drivers/ddr/marvell/a38x/ddr3_debug.c b/drivers/ddr/marvell/a38x/ddr3_debug.c
index 1d72bc569e4bbf2579d6f1eb9008f2e1a471e1ca..12b5b04109d3e5090121ada7b075a907a6b4e057 100644 (file)
--- a/drivers/ddr/marvell/a38x/ddr3_debug.c
+++ b/drivers/ddr/marvell/a38x/ddr3_debug.c
@@ -164,21 +164,6 @@ int ddr3_tip_init_config_func(u32 dev_num,
        return MV_OK;
 }
 
-/*
- * Read training result table
- */
-int hws_ddr3_tip_read_training_result(
-       u32 dev_num, enum hws_result result[MAX_STAGE_LIMIT][MAX_INTERFACE_NUM])
-{
-       dev_num = dev_num;
-
-       if (result == NULL)
-               return MV_BAD_PARAM;
-       memcpy(result, training_result, sizeof(result));
-
-       return MV_OK;
-}
-
 /*
  * Get training result info pointer
  */

diff --git a/drivers/ddr/marvell/a38x/ddr3_training_ip.h b/drivers/ddr/marvell/a38x/ddr3_training_ip.h
index 76a1b6a06d49bc65332c03a44cd93a3b6bba2722..ed92873697e3978fcedbed27fbd4743d62f4d29a 100644 (file)
--- a/drivers/ddr/marvell/a38x/ddr3_training_ip.h
+++ b/drivers/ddr/marvell/a38x/ddr3_training_ip.h
@@ -171,8 +171,6 @@ int hws_ddr3_tip_load_topology_map(u32 dev_num,
                                   struct hws_topology_map *topology);
 int hws_ddr3_tip_run_alg(u32 dev_num, enum hws_algo_type algo_type);
 int hws_ddr3_tip_mode_read(u32 dev_num, struct mode_info *mode_info);
-int hws_ddr3_tip_read_training_result(u32 dev_num,
-               enum hws_result result[MAX_STAGE_LIMIT][MAX_INTERFACE_NUM]);
 int ddr3_tip_is_pup_lock(u32 *pup_buf, enum hws_training_result read_mode);
 u8 ddr3_tip_get_buf_min(u8 *buf_ptr);
 u8 ddr3_tip_get_buf_max(u8 *buf_ptr);