nvme-pci: fix doorbell buffer value endianness

[ Upstream commit b5f96cb719d8ba220b565ddd3ba4ac0d8bcfb130 ]

When using shadow doorbells, the event index and the doorbell values are
written to host memory. Prior to this patch, the values written would
erroneously be written in host endianness. This causes trouble on
big-endian platforms. Fix this by adding missing endian conversions.

This issue was noticed by Guenter while testing various big-endian
platforms under QEMU[1]. A similar fix required for hw/nvme in QEMU is
up for review as well[2].

  [1]: https://lore.kernel.org/qemu-devel/20221209110022.GA3396194@roeck-us.net/
  [2]: https://lore.kernel.org/qemu-devel/20221212114409.34972-4-its@irrelevant.dk/

Fixes: 661866263bcd ("nvme: improve performance for virtual NVMe devices")
Reported-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c
index 10fe7a7a2163c27a782a8baaba722a1a5dfbf7f2..5d62d1042c0e6db562f84b25696e615608b9d1bf 100644 (file)
--- a/drivers/nvme/host/pci.c
+++ b/drivers/nvme/host/pci.c
@@ -117,9 +117,9 @@ struct nvme_dev {
        mempool_t *iod_mempool;
 
        /* shadow doorbell buffer support: */
-       u32 *dbbuf_dbs;
+       __le32 *dbbuf_dbs;
        dma_addr_t dbbuf_dbs_dma_addr;
-       u32 *dbbuf_eis;
+       __le32 *dbbuf_eis;
        dma_addr_t dbbuf_eis_dma_addr;
 
        /* host memory buffer support: */
@@ -187,10 +187,10 @@ struct nvme_queue {
 #define NVMEQ_SQ_CMB           1
 #define NVMEQ_DELETE_ERROR     2
 #define NVMEQ_POLLED           3
-       u32 *dbbuf_sq_db;
-       u32 *dbbuf_cq_db;
-       u32 *dbbuf_sq_ei;
-       u32 *dbbuf_cq_ei;
+       __le32 *dbbuf_sq_db;
+       __le32 *dbbuf_cq_db;
+       __le32 *dbbuf_sq_ei;
+       __le32 *dbbuf_cq_ei;
        struct completion delete_done;
 };
 
@@ -311,11 +311,11 @@ static inline int nvme_dbbuf_need_event(u16 event_idx, u16 new_idx, u16 old)
 }
 
 /* Update dbbuf and return true if an MMIO is required */
-static bool nvme_dbbuf_update_and_check_event(u16 value, u32 *dbbuf_db,
-                                             volatile u32 *dbbuf_ei)
+static bool nvme_dbbuf_update_and_check_event(u16 value, __le32 *dbbuf_db,
+                                             volatile __le32 *dbbuf_ei)
 {
        if (dbbuf_db) {
-               u16 old_value;
+               u16 old_value, event_idx;
 
                /*
                 * Ensure that the queue is written before updating
@@ -323,8 +323,8 @@ static bool nvme_dbbuf_update_and_check_event(u16 value, u32 *dbbuf_db,
                 */
                wmb();
 
-               old_value = *dbbuf_db;
-               *dbbuf_db = value;
+               old_value = le32_to_cpu(*dbbuf_db);
+               *dbbuf_db = cpu_to_le32(value);
 
                /*
                 * Ensure that the doorbell is updated before reading the event
@@ -334,7 +334,8 @@ static bool nvme_dbbuf_update_and_check_event(u16 value, u32 *dbbuf_db,
                 */
                mb();
 
-               if (!nvme_dbbuf_need_event(*dbbuf_ei, value, old_value))
+               event_idx = le32_to_cpu(*dbbuf_ei);
+               if (!nvme_dbbuf_need_event(event_idx, value, old_value))
                        return false;
        }