]> git.baikalelectronics.ru Git - arm-tf.git/commitdiff
fix(tegra210): mark bits [23:17] as zero for Fast SMCs
authorKalyani Chidambaram Vaidyanathan <kalyanic@nvidia.com>
Mon, 24 Apr 2023 20:56:12 +0000 (13:56 -0700)
committerVarun Wadekar <vwadekar@nvidia.com>
Fri, 12 May 2023 08:54:51 +0000 (09:54 +0100)
Per SMCCC documentation, bits [23:17] must be zero for Fast
SMCs. Other values are reserved for future use. Ensure that
these bits are zeroes for TEGRA_SIP_PMC_COMMANDS.

Commit f8a35797 introduced a check to return error if these
bits are not zero, thus breaking Tegra210 platforms. This
patch fixes the anomaly.

Change-Id: I19edc3b33c999a6fee6b86184233fba146316466
Signed-off-by: Kalyani Chidambaram Vaidyanathan <kalyanic@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
plat/nvidia/tegra/soc/t210/plat_sip_calls.c

index 93d12832ef4fc9078d92b92412589601321719b8..f3ebd4bb9d90605b47509a08ebe8c9d3a906cd7a 100644 (file)
@@ -33,8 +33,7 @@
 /*******************************************************************************
  * Tegra210 SiP SMCs
  ******************************************************************************/
-#define TEGRA_SIP_PMC_COMMANDS_LEGACY  U(0xC2FEFE00)
-#define TEGRA_SIP_PMC_COMMANDS         U(0xC2FFFE00)
+#define TEGRA_SIP_PMC_COMMANDS         U(0xC200FE00)
 
 /*******************************************************************************
  * This function is responsible for handling all T210 SiP calls
@@ -55,10 +54,12 @@ int plat_sip_handler(uint32_t smc_fid,
        if (!ns)
                SMC_RET1(handle, SMC_UNK);
 
-       if ((smc_fid == TEGRA_SIP_PMC_COMMANDS) || (smc_fid == TEGRA_SIP_PMC_COMMANDS_LEGACY)) {
+       if (smc_fid == TEGRA_SIP_PMC_COMMANDS) {
+
                /* check the address is within PMC range and is 4byte aligned */
-               if ((x2 >= TEGRA_PMC_SIZE) || (x2 & 0x3))
+               if ((x2 >= TEGRA_PMC_SIZE) || (x2 & 0x3)) {
                        return -EINVAL;
+               }
 
                switch (x2) {
                /* Black listed PMC registers */