]> git.baikalelectronics.ru Git - kernel.git/commitdiff
arm64: dts: mediatek: mt7986: add support for Wireless Ethernet Dispatch
authorLorenzo Bianconi <lorenzo@kernel.org>
Tue, 20 Sep 2022 10:11:13 +0000 (12:11 +0200)
committerPaolo Abeni <pabeni@redhat.com>
Thu, 22 Sep 2022 13:13:23 +0000 (15:13 +0200)
Introduce wed0 and wed1 nodes in order to enable offloading forwarding
between ethernet and wireless devices on the mt7986 chipset.

Co-developed-by: Bo Jiao <Bo.Jiao@mediatek.com>
Signed-off-by: Bo Jiao <Bo.Jiao@mediatek.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
arch/arm64/boot/dts/mediatek/mt7986a.dtsi

index e3a407d03551fec7c66243ce8f1439d54b514806..692102f6248d6d96ca9ca4fe432a0ad520420593 100644 (file)
                         #reset-cells = <1>;
                };
 
+               wed_pcie: wed-pcie@10003000 {
+                       compatible = "mediatek,mt7986-wed-pcie",
+                                    "syscon";
+                       reg = <0 0x10003000 0 0x10>;
+               };
+
+               wed0: wed@15010000 {
+                       compatible = "mediatek,mt7986-wed",
+                                    "syscon";
+                       reg = <0 0x15010000 0 0x1000>;
+                       interrupt-parent = <&gic>;
+                       interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
+               wed1: wed@15011000 {
+                       compatible = "mediatek,mt7986-wed",
+                                    "syscon";
+                       reg = <0 0x15011000 0 0x1000>;
+                       interrupt-parent = <&gic>;
+                       interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
                eth: ethernet@15100000 {
                        compatible = "mediatek,mt7986-eth";
                        reg = <0 0x15100000 0 0x80000>;
                                                 <&apmixedsys CLK_APMIXED_SGMPLL>;
                        mediatek,ethsys = <&ethsys>;
                        mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>;
+                       mediatek,wed-pcie = <&wed_pcie>;
+                       mediatek,wed = <&wed0>, <&wed1>;
                        #reset-cells = <1>;
                        #address-cells = <1>;
                        #size-cells = <0>;