]> git.baikalelectronics.ru Git - kernel.git/commitdiff
powerpc/603: Remove outdated comment
authorChristophe Leroy <christophe.leroy@csgroup.eu>
Mon, 31 Jan 2022 07:15:12 +0000 (07:15 +0000)
committerMichael Ellerman <mpe@ellerman.id.au>
Thu, 3 Feb 2022 11:38:13 +0000 (22:38 +1100)
Since commit 85f20fdf3995 ("powerpc/603: don't handle PAGE_ACCESSED
in TLB miss handlers.") page table is not updated anymore by
TLB miss handlers.

Remove the comment.

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/38b1ffefd2146fa56bf8aa605d476ad9736bbb37.1643613296.git.christophe.leroy@csgroup.eu
arch/powerpc/kernel/head_book3s_32.S

index fa84744d6b2486edbfc47613658e2b0a0a8f2564..7e27b44c1d89ed8290ef978d057c6aa948ec30ac 100644 (file)
@@ -504,10 +504,6 @@ DataLoadTLBMiss:
        lwz     r0,0(r2)                /* get linux-style pte */
        andc.   r1,r1,r0                /* check access & ~permission */
        bne-    DataAddressInvalid      /* return if access not permitted */
-       /*
-        * NOTE! We are assuming this is not an SMP system, otherwise
-        * we would need to update the pte atomically with lwarx/stwcx.
-        */
        /* Convert linux-style PTE to low word of PPC-style PTE */
        rlwinm  r1,r0,32-9,30,30        /* _PAGE_RW -> PP msb */
        rlwimi  r0,r0,32-1,30,30        /* _PAGE_USER -> PP msb */
@@ -586,10 +582,6 @@ DataStoreTLBMiss:
        lwz     r0,0(r2)                /* get linux-style pte */
        andc.   r1,r1,r0                /* check access & ~permission */
        bne-    DataAddressInvalid      /* return if access not permitted */
-       /*
-        * NOTE! We are assuming this is not an SMP system, otherwise
-        * we would need to update the pte atomically with lwarx/stwcx.
-        */
        /* Convert linux-style PTE to low word of PPC-style PTE */
        rlwimi  r0,r0,32-2,31,31        /* _PAGE_USER -> PP lsb */
        li      r1,0xe06                /* clear out reserved bits & PP msb */