KVM: PPC: Book3S HV: Remove radix guest support from P7/8 path

The P9 path now runs all supported radix guest combinations, so
remove radix guest support from the P7/8 path.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20210528090752.3542186-24-npiggin@gmail.com

diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 28af4efb458701ea041741d9065b86eb55bcd005..aa267d173ded0ce2bd7ad9123bdc9e8d69d1e3b6 100644 (file)
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -534,7 +534,6 @@ int main(void)
        OFFSET(VCPU_SLB_NR, kvm_vcpu, arch.slb_nr);
        OFFSET(VCPU_FAULT_DSISR, kvm_vcpu, arch.fault_dsisr);
        OFFSET(VCPU_FAULT_DAR, kvm_vcpu, arch.fault_dar);
-       OFFSET(VCPU_FAULT_GPA, kvm_vcpu, arch.fault_gpa);
        OFFSET(VCPU_INTR_MSR, kvm_vcpu, arch.intr_msr);
        OFFSET(VCPU_LAST_INST, kvm_vcpu, arch.last_inst);
        OFFSET(VCPU_TRAP, kvm_vcpu, arch.trap);

diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 3b8fd4bd2419952243829e2a51bfec764212798f..bf441b9b03cb4380913b7aca8ecdd11eb91f2ebd 100644 (file)
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -134,15 +134,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
        /* Return the trap number on this thread as the return value */
        mr      r3, r12
 
-       /*
-        * If we came back from the guest via a relocation-on interrupt,
-        * we will be in virtual mode at this point, which makes it a
-        * little easier to get back to the caller.
-        */
-       mfmsr   r0
-       andi.   r0, r0, MSR_IR          /* in real mode? */
-       bne     .Lvirt_return
-
        /* RFI into the highmem handler */
        mfmsr   r6
        li      r0, MSR_RI
@@ -152,11 +143,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
        mtsrr1  r7
        RFI_TO_KERNEL
 
-       /* Virtual-mode return */
-.Lvirt_return:
-       mtlr    r8
-       blr
-
 kvmppc_primary_no_guest:
        /* We handle this much like a ceded vcpu */
        /* put the HDEC into the DEC, since HDEC interrupts don't wake us */
@@ -902,11 +888,6 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_300)
        cmpdi   r3, 512         /* 1 microsecond */
        blt     hdec_soon
 
-       ld      r6, VCPU_KVM(r4)
-       lbz     r0, KVM_RADIX(r6)
-       cmpwi   r0, 0
-       bne     9f
-
        /* For hash guest, clear out and reload the SLB */
 BEGIN_MMU_FTR_SECTION
        /* Radix host won't have populated the SLB, so no need to clear */
@@ -1094,12 +1075,8 @@ BEGIN_FTR_SECTION
        mtspr   SPRN_HDSISR, r0
 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
 
-       ld      r6, VCPU_KVM(r4)
-       lbz     r7, KVM_SECURE_GUEST(r6)
-       cmpdi   r7, 0
        ld      r6, VCPU_GPR(R6)(r4)
        ld      r7, VCPU_GPR(R7)(r4)
-       bne     ret_to_ultra
 
        ld      r0, VCPU_CR(r4)
        mtcr    r0
@@ -1110,26 +1087,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
        ld      r4, VCPU_GPR(R4)(r4)
        HRFI_TO_GUEST
        b       .
-/*
- * Use UV_RETURN ultracall to return control back to the Ultravisor after
- * processing an hypercall or interrupt that was forwarded (a.k.a. reflected)
- * to the Hypervisor.
- *
- * All registers have already been loaded, except:
- *   R0 = hcall result
- *   R2 = SRR1, so UV can detect a synthesized interrupt (if any)
- *   R3 = UV_RETURN
- */
-ret_to_ultra:
-       ld      r0, VCPU_CR(r4)
-       mtcr    r0
-
-       ld      r0, VCPU_GPR(R3)(r4)
-       mfspr   r2, SPRN_SRR1
-       li      r3, 0
-       ori     r3, r3, UV_RETURN
-       ld      r4, VCPU_GPR(R4)(r4)
-       sc      2
 
 secondary_too_late:
        li      r12, 0
@@ -1392,11 +1349,7 @@ guest_exit_cont:         /* r9 = vcpu, r12 = trap, r13 = paca */
        patch_site 1b patch__call_kvm_flush_link_stack
 
        /* For hash guest, read the guest SLB and save it away */
-       ld      r5, VCPU_KVM(r9)
-       lbz     r0, KVM_RADIX(r5)
        li      r5, 0
-       cmpwi   r0, 0
-       bne     0f                      /* for radix, save 0 entries */
        lwz     r0,VCPU_SLB_NR(r9)      /* number of entries in SLB */
        mtctr   r0
        li      r6,0
@@ -1435,23 +1388,6 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_RADIX)
        slbmte  r6,r5
 1:     addi    r8,r8,16
        .endr
-       b       guest_bypass
-
-0:     /*
-        * Malicious or buggy radix guests may have inserted SLB entries
-        * (only 0..3 because radix always runs with UPRT=1), so these must
-        * be cleared here to avoid side-channels. slbmte is used rather
-        * than slbia, as it won't clear cached translations.
-        */
-       li      r0,0
-       stw     r0,VCPU_SLB_MAX(r9)
-       slbmte  r0,r0
-       li      r4,1
-       slbmte  r0,r4
-       li      r4,2
-       slbmte  r0,r4
-       li      r4,3
-       slbmte  r0,r4
 
 guest_bypass:
        stw     r12, STACK_SLOT_TRAP(r1)
@@ -1701,24 +1637,6 @@ BEGIN_FTR_SECTION
        mtspr   SPRN_PID, r7
 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
 
-#ifdef CONFIG_PPC_RADIX_MMU
-       /*
-        * Are we running hash or radix ?
-        */
-       ld      r5, VCPU_KVM(r9)
-       lbz     r0, KVM_RADIX(r5)
-       cmpwi   cr2, r0, 0
-       beq     cr2, 2f
-
-       /*
-        * Radix: do eieio; tlbsync; ptesync sequence in case we
-        * interrupted the guest between a tlbie and a ptesync.
-        */
-       eieio
-       tlbsync
-       ptesync
-#endif /* CONFIG_PPC_RADIX_MMU */
-
        /*
         * cp_abort is required if the processor supports local copy-paste
         * to clear the copy buffer that was under control of the guest.
@@ -1977,8 +1895,6 @@ kvmppc_tm_emul:
  * reflect the HDSI to the guest as a DSI.
  */
 kvmppc_hdsi:
-       ld      r3, VCPU_KVM(r9)
-       lbz     r0, KVM_RADIX(r3)
        mfspr   r4, SPRN_HDAR
        mfspr   r6, SPRN_HDSISR
 BEGIN_FTR_SECTION
@@ -1986,8 +1902,6 @@ BEGIN_FTR_SECTION
        cmpdi   r6, 0x7fff
        beq     6f
 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
-       cmpwi   r0, 0
-       bne     .Lradix_hdsi            /* on radix, just save DAR/DSISR/ASDR */
        /* HPTE not found fault or protection fault? */
        andis.  r0, r6, (DSISR_NOHPTE | DSISR_PROTFAULT)@h
        beq     1f                      /* if not, send it to the guest */
@@ -2064,23 +1978,11 @@ fast_interrupt_c_return:
        stb     r0, HSTATE_IN_GUEST(r13)
        b       guest_exit_cont
 
-.Lradix_hdsi:
-       std     r4, VCPU_FAULT_DAR(r9)
-       stw     r6, VCPU_FAULT_DSISR(r9)
-.Lradix_hisi:
-       mfspr   r5, SPRN_ASDR
-       std     r5, VCPU_FAULT_GPA(r9)
-       b       guest_exit_cont
-
 /*
  * Similarly for an HISI, reflect it to the guest as an ISI unless
  * it is an HPTE not found fault for a page that we have paged out.
  */
 kvmppc_hisi:
-       ld      r3, VCPU_KVM(r9)
-       lbz     r0, KVM_RADIX(r3)
-       cmpwi   r0, 0
-       bne     .Lradix_hisi            /* for radix, just save ASDR */
        andis.  r0, r11, SRR1_ISI_NOPT@h
        beq     1f
        andi.   r0, r11, MSR_IR         /* instruction relocation enabled? */
@@ -3224,15 +3126,16 @@ BEGIN_FTR_SECTION
        mtspr   SPRN_DAWRX1, r0
 END_FTR_SECTION_IFSET(CPU_FTR_DAWR1)
 
-       /* Clear hash and radix guest SLB. */
+       /* Clear guest SLB. */
        slbmte  r0, r0
        PPC_SLBIA(6)
+       ptesync
 
 BEGIN_MMU_FTR_SECTION
        b       4f
 END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_RADIX)
 
-       ptesync
+       /* load host SLB entries */
        ld      r8, PACA_SLBSHADOWPTR(r13)
        .rept   SLB_NUM_BOLTED
        li      r3, SLBSHADOW_SAVEAREA