drm/i915/icl: Define display GPIO pins for DSI

Display Pins are the only GPIOs that need to be used by
driver for DSI panels. So driver should now have its own
implementation to toggle these pins based on GPIO info
received from VBT sequences.

Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/e7e3bb05d4f48b1876169a69f495bcf6d511fda5.1543500286.git.jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/intel_dsi_vbt.c b/drivers/gpu/drm/i915/intel_dsi_vbt.c
index a72de81f4832381e21900f72fdbbc3e116c75bae..b41ca64364017cefde8e3faf563190d350e535d4 100644 (file)
--- a/drivers/gpu/drm/i915/intel_dsi_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_vbt.c
@@ -103,6 +103,18 @@ static struct gpio_map vlv_gpio_table[] = {
 #define CHV_GPIO_PAD_CFG1(f, i)                (0x4400 + (f) * 0x400 + (i) * 8 + 4)
 #define  CHV_GPIO_CFGLOCK              (1 << 31)
 
+/* ICL DSI Display GPIO Pins */
+#define  ICL_GPIO_DDSP_HPD_A           0
+#define  ICL_GPIO_L_VDDEN_1            1
+#define  ICL_GPIO_L_BKLTEN_1           2
+#define  ICL_GPIO_DDPA_CTRLCLK_1       3
+#define  ICL_GPIO_DDPA_CTRLDATA_1      4
+#define  ICL_GPIO_DDSP_HPD_B           5
+#define  ICL_GPIO_L_VDDEN_2            6
+#define  ICL_GPIO_L_BKLTEN_2           7
+#define  ICL_GPIO_DDPA_CTRLCLK_2       8
+#define  ICL_GPIO_DDPA_CTRLDATA_2      9
+
 static inline enum port intel_dsi_seq_port_to_port(u8 port)
 {
        return port ? PORT_C : PORT_A;