]> git.baikalelectronics.ru Git - kernel.git/commitdiff
drm/i915/display: Use to_gt() helper
authorMichał Winiarski <michal.winiarski@intel.com>
Tue, 14 Dec 2021 19:33:33 +0000 (21:33 +0200)
committerMatt Roper <matthew.d.roper@intel.com>
Sat, 18 Dec 2021 05:49:50 +0000 (21:49 -0800)
Use to_gt() helper consistently throughout the codebase.
Pure mechanical s/i915->gt/to_gt(i915). No functional changes.

Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211214193346.21231-4-andi.shyti@linux.intel.com
drivers/gpu/drm/i915/display/intel_atomic_plane.c
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_dpt.c
drivers/gpu/drm/i915/display/intel_overlay.c

index cdc68fb51ba6bf5fedded2c1403fc33ad7b97c4c..a15eabca16dc993c5c2b7be412d29e6b29e54358 100644 (file)
@@ -769,7 +769,7 @@ intel_prepare_plane_fb(struct drm_plane *_plane,
         * maximum clocks following a vblank miss (see do_rps_boost()).
         */
        if (!state->rps_interactive) {
-               intel_rps_mark_interactive(&dev_priv->gt.rps, true);
+               intel_rps_mark_interactive(&to_gt(dev_priv)->rps, true);
                state->rps_interactive = true;
        }
 
@@ -803,7 +803,7 @@ intel_cleanup_plane_fb(struct drm_plane *plane,
                return;
 
        if (state->rps_interactive) {
-               intel_rps_mark_interactive(&dev_priv->gt.rps, false);
+               intel_rps_mark_interactive(&to_gt(dev_priv)->rps, false);
                state->rps_interactive = false;
        }
 
index 06e64289b9d1161d61aaed75045f764d05ed5e0b..03cec6eaf2e91e0b3657c6f9e4257a0872bbf367 100644 (file)
@@ -1192,7 +1192,7 @@ __intel_display_resume(struct drm_device *dev,
 static bool gpu_reset_clobbers_display(struct drm_i915_private *dev_priv)
 {
        return (INTEL_INFO(dev_priv)->gpu_reset_clobbers_display &&
-               intel_has_gpu_reset(&dev_priv->gt));
+               intel_has_gpu_reset(to_gt(dev_priv)));
 }
 
 void intel_display_prepare_reset(struct drm_i915_private *dev_priv)
@@ -1211,14 +1211,14 @@ void intel_display_prepare_reset(struct drm_i915_private *dev_priv)
                return;
 
        /* We have a modeset vs reset deadlock, defensively unbreak it. */
-       set_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags);
+       set_bit(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags);
        smp_mb__after_atomic();
-       wake_up_bit(&dev_priv->gt.reset.flags, I915_RESET_MODESET);
+       wake_up_bit(&to_gt(dev_priv)->reset.flags, I915_RESET_MODESET);
 
        if (atomic_read(&dev_priv->gpu_error.pending_fb_pin)) {
                drm_dbg_kms(&dev_priv->drm,
                            "Modeset potentially stuck, unbreaking through wedging\n");
-               intel_gt_set_wedged(&dev_priv->gt);
+               intel_gt_set_wedged(to_gt(dev_priv));
        }
 
        /*
@@ -1269,7 +1269,7 @@ void intel_display_finish_reset(struct drm_i915_private *dev_priv)
                return;
 
        /* reset doesn't touch the display */
-       if (!test_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags))
+       if (!test_bit(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags))
                return;
 
        state = fetch_and_zero(&dev_priv->modeset_restore_state);
@@ -1307,7 +1307,7 @@ unlock:
        drm_modeset_acquire_fini(ctx);
        mutex_unlock(&dev->mode_config.mutex);
 
-       clear_bit_unlock(I915_RESET_MODESET, &dev_priv->gt.reset.flags);
+       clear_bit_unlock(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags);
 }
 
 static bool underrun_recovery_supported(const struct intel_crtc_state *crtc_state)
@@ -8611,7 +8611,7 @@ static bool bo_has_valid_encryption(struct drm_i915_gem_object *obj)
 {
        struct drm_i915_private *i915 = to_i915(obj->base.dev);
 
-       return intel_pxp_key_check(&i915->gt.pxp, obj, false) == 0;
+       return intel_pxp_key_check(&to_gt(i915)->pxp, obj, false) == 0;
 }
 
 static bool pxp_is_borked(struct drm_i915_gem_object *obj)
@@ -9701,19 +9701,19 @@ static void intel_atomic_commit_fence_wait(struct intel_atomic_state *intel_stat
        for (;;) {
                prepare_to_wait(&intel_state->commit_ready.wait,
                                &wait_fence, TASK_UNINTERRUPTIBLE);
-               prepare_to_wait(bit_waitqueue(&dev_priv->gt.reset.flags,
+               prepare_to_wait(bit_waitqueue(&to_gt(dev_priv)->reset.flags,
                                              I915_RESET_MODESET),
                                &wait_reset, TASK_UNINTERRUPTIBLE);
 
 
                if (i915_sw_fence_done(&intel_state->commit_ready) ||
-                   test_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags))
+                   test_bit(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags))
                        break;
 
                schedule();
        }
        finish_wait(&intel_state->commit_ready.wait, &wait_fence);
-       finish_wait(bit_waitqueue(&dev_priv->gt.reset.flags,
+       finish_wait(bit_waitqueue(&to_gt(dev_priv)->reset.flags,
                                  I915_RESET_MODESET),
                    &wait_reset);
 }
index 8f7b1f7534a48ae436898c187ead9b913af64b1e..53449de5f7444505f8742a6fff0ac59cb478807a 100644 (file)
@@ -206,7 +206,7 @@ intel_dpt_create(struct intel_framebuffer *fb)
 
        vm = &dpt->vm;
 
-       vm->gt = &i915->gt;
+       vm->gt = to_gt(i915);
        vm->i915 = i915;
        vm->dma = i915->drm.dev;
        vm->total = (size / sizeof(gen8_pte_t)) * I915_GTT_PAGE_SIZE;
index 7e3f5c6ca4846f38f8a06691aead25bb8154ba77..1a376e9a1ff3caa5cb8ae512cf4063f15ba766d4 100644 (file)
@@ -1382,7 +1382,7 @@ void intel_overlay_setup(struct drm_i915_private *dev_priv)
        if (!HAS_OVERLAY(dev_priv))
                return;
 
-       engine = dev_priv->gt.engine[RCS0];
+       engine = to_gt(dev_priv)->engine[RCS0];
        if (!engine || !engine->kernel_context)
                return;