]> git.baikalelectronics.ru Git - kernel.git/commitdiff
drm/i915/dsi: Fix state mismatch warns for horizontal timings with DSC
authorVandita Kulkarni <vandita.kulkarni@intel.com>
Tue, 10 Dec 2019 10:50:59 +0000 (12:50 +0200)
committerJani Nikula <jani.nikula@intel.com>
Wed, 11 Dec 2019 06:19:49 +0000 (08:19 +0200)
When DSC is enabled consider the compression ratio that was used during
horizontal timing calculations.

This may still lead to warns due to rounding errors in the round-trip.

v2 by Jani:
- rebase on top of the more generic dsc state readout

Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/c2481aaf67ea396aa4698cd2d8e23d19ec4f4ecf.1575974743.git.jani.nikula@intel.com
drivers/gpu/drm/i915/display/icl_dsi.c

index caa477c4b1aff7c3e7c85520b9d9fbb445712734..b1d775d834d4c152ec10ad93e98ab96dafea47e4 100644 (file)
@@ -1255,6 +1255,18 @@ static void gen11_dsi_get_timings(struct intel_encoder *encoder,
        struct drm_display_mode *adjusted_mode =
                                        &pipe_config->hw.adjusted_mode;
 
+       if (pipe_config->dsc.compressed_bpp) {
+               int div = pipe_config->dsc.compressed_bpp;
+               int mul = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format);
+
+               adjusted_mode->crtc_htotal =
+                       DIV_ROUND_UP(adjusted_mode->crtc_htotal * mul, div);
+               adjusted_mode->crtc_hsync_start =
+                       DIV_ROUND_UP(adjusted_mode->crtc_hsync_start * mul, div);
+               adjusted_mode->crtc_hsync_end =
+                       DIV_ROUND_UP(adjusted_mode->crtc_hsync_end * mul, div);
+       }
+
        if (intel_dsi->dual_link) {
                adjusted_mode->crtc_hdisplay *= 2;
                if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK)