]> git.baikalelectronics.ru Git - kernel.git/commitdiff
mmc: sdhci: fix minimum clock rate for v3 controller
authorMichał Mirosław <mirq-linux@rere.qmqm.pl>
Wed, 15 Jan 2020 09:54:35 +0000 (10:54 +0100)
committerUlf Hansson <ulf.hansson@linaro.org>
Mon, 20 Jan 2020 09:36:27 +0000 (10:36 +0100)
For SDHCIv3+ with programmable clock mode, minimal clock frequency is
still base clock / max(divider). Minimal programmable clock frequency is
always greater than minimal divided clock frequency. Without this patch,
SDHCI uses out-of-spec initial frequency when multiplier is big enough:

mmc1: mmc_rescan_try_freq: trying to init card at 468750 Hz
[for 480 MHz source clock divided by 1024]

The code in sdhci_calc_clk() already chooses a correct SDCLK clock mode.

Fixes: abf8d224eea8 ("mmc: sdhci: add support for programmable clock mode")
Cc: <stable@vger.kernel.org> # 4c03b16b6775: mmc: tegra: Only advertise UHS modes if IO regulator is present
Cc: <stable@vger.kernel.org>
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/ffb489519a446caffe7a0a05c4b9372bd52397bb.1579082031.git.mirq-linux@rere.qmqm.pl
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
drivers/mmc/host/sdhci.c

index 1b1c26da3fe0b52dc4abfbe9d782356949f58bde..659a9459ace349ff455eed371b1a4acbc3a7edcf 100644 (file)
@@ -3913,11 +3913,13 @@ int sdhci_setup_host(struct sdhci_host *host)
        if (host->ops->get_min_clock)
                mmc->f_min = host->ops->get_min_clock(host);
        else if (host->version >= SDHCI_SPEC_300) {
-               if (host->clk_mul) {
-                       mmc->f_min = (host->max_clk * host->clk_mul) / 1024;
+               if (host->clk_mul)
                        max_clk = host->max_clk * host->clk_mul;
-               } else
-                       mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300;
+               /*
+                * Divided Clock Mode minimum clock rate is always less than
+                * Programmable Clock Mode minimum clock rate.
+                */
+               mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300;
        } else
                mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200;