drm/i915/gvt: Add mmio handler for CFL

Add registers of 0x4ab8 and 0x2248 into MMIO handler.

Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Fei Jiang <fei.jiang@intel.com>
Signed-off-by: fred gao <fred.gao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>

diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
index c1170f42b6a1cf9cbdcbe62b6bacbeab05ea19be..9910ba16d815036ad9ac5d2a849f704c5a1b2214 100644 (file)
--- a/drivers/gpu/drm/i915/gvt/handlers.c
+++ b/drivers/gpu/drm/i915/gvt/handlers.c
@@ -3043,8 +3043,8 @@ static int init_skl_mmio_info(struct intel_gvt *gvt)
        MMIO_DFH(GEN9_WM_CHICKEN3, D_SKL_PLUS, F_MODE_MASK | F_CMD_ACCESS,
                 NULL, NULL);
 
-       MMIO_D(_MMIO(0x4ab8), D_KBL);
-       MMIO_D(_MMIO(0x2248), D_KBL | D_SKL);
+       MMIO_D(_MMIO(0x4ab8), D_KBL | D_CFL);
+       MMIO_D(_MMIO(0x2248), D_SKL_PLUS);
 
        return 0;
 }