USB: ehci tdi : let's tdi_reset set host mode

tdi_reset is already taking care of setting host mode for tdi devices.
Don't duplicate code in platform driver.

Make ehci_halt a nop if the controller is not in host mode (otherwise it
will fail), and let's ehci_reset do the tdi_reset.
We need to move hcd->has_tt flags before ehci_halt, in order ehci_halt
knows we are a tdi device.

Before the setup routine was doing :
- put controller in host mode
- ehci_halt
- ehci_init
- hcd->has_tt = 1;
- ehci_reset

Now we do :
- hcd->has_tt = 1;
- ehci_halt
- ehci_init
- ehci_reset

PS : now we handle correctly the device -> host transition.

Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index a416421abfa2e23f212614709b79424175b1d7ca..8600317bd60b6619065d175ec7eeaf9d58ada47c 100644 (file)
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -233,8 +233,6 @@ static void mpc83xx_usb_setup(struct usb_hcd *hcd)
                        mpc83xx_setup_phy(ehci, pdata->phy_mode, 1);
        }
 
-       /* put controller in host mode. */
-       ehci_writel(ehci, 0x00000003, non_ehci + FSL_SOC_USB_USBMODE);
 #ifdef CONFIG_PPC_85xx
        out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
        out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
@@ -270,6 +268,8 @@ static int ehci_fsl_setup(struct usb_hcd *hcd)
        /* cache this readonly data; minimize chip reads */
        ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 
+       hcd->has_tt = 1;
+
        retval = ehci_halt(ehci);
        if (retval)
                return retval;
@@ -279,8 +279,6 @@ static int ehci_fsl_setup(struct usb_hcd *hcd)
        if (retval)
                return retval;
 
-       hcd->has_tt = 1;
-
        ehci->sbrn = 0x20;
 
        ehci_reset(ehci);

diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
index b5e59db53347fa37df58456252e50876608b6c35..eb537aa546106664ea4f99535f8581409bc18a8d 100644 (file)
--- a/drivers/usb/host/ehci-fsl.h
+++ b/drivers/usb/host/ehci-fsl.h
@@ -27,7 +27,6 @@
 #define        PORT_PTS_SERIAL         (3<<30)
 #define PORT_PTS_PTW           (1<<28)
 #define FSL_SOC_USB_PORTSC2    0x188
-#define FSL_SOC_USB_USBMODE    0x1a8
 #define FSL_SOC_USB_SNOOP1     0x400   /* NOTE: big-endian */
 #define FSL_SOC_USB_SNOOP2     0x404   /* NOTE: big-endian */
 #define FSL_SOC_USB_AGECNTTHRSH        0x408   /* NOTE: big-endian */

diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 34a928d3b7d2f69ddf671330cc9bbb60dbf5405c..15fe3ecd203ba4b67b19e9afb97def6ade2f4e29 100644 (file)
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -194,6 +194,17 @@ static int handshake (struct ehci_hcd *ehci, void __iomem *ptr,
        return -ETIMEDOUT;
 }
 
+/* check TDI/ARC silicon is in host mode */
+static int tdi_in_host_mode (struct ehci_hcd *ehci)
+{
+       u32 __iomem     *reg_ptr;
+       u32             tmp;
+
+       reg_ptr = (u32 __iomem *)(((u8 __iomem *)ehci->regs) + USBMODE);
+       tmp = ehci_readl(ehci, reg_ptr);
+       return (tmp & 3) == USBMODE_CM_HC;
+}
+
 /* force HC to halt state from unknown (EHCI spec section 2.3) */
 static int ehci_halt (struct ehci_hcd *ehci)
 {
@@ -202,6 +213,10 @@ static int ehci_halt (struct ehci_hcd *ehci)
        /* disable any irqs left enabled by previous code */
        ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 
+       if (ehci_is_TDI(ehci) && tdi_in_host_mode(ehci) == 0) {
+               return 0;
+       }
+
        if ((temp & STS_HALT) != 0)
                return 0;
 

diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index a8ad8ac120a2bfe733eaa2d151ad528afc15685d..ac9c4d7c44af227ff974b6f5af7636013583bcbc 100644 (file)
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -26,9 +26,6 @@
 #include <mach/mxc_ehci.h>
 
 #define ULPI_VIEWPORT_OFFSET   0x170
-#define PORTSC_OFFSET          0x184
-#define USBMODE_OFFSET         0x1a8
-#define USBMODE_CM_HOST                3
 
 struct ehci_mxc_priv {
        struct clk *usbclk, *ahbclk;
@@ -51,6 +48,8 @@ static int ehci_mxc_setup(struct usb_hcd *hcd)
        /* cache this readonly data; minimize chip reads */
        ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 
+       hcd->has_tt = 1;
+
        retval = ehci_halt(ehci);
        if (retval)
                return retval;
@@ -60,8 +59,6 @@ static int ehci_mxc_setup(struct usb_hcd *hcd)
        if (retval)
                return retval;
 
-       hcd->has_tt = 1;
-
        ehci->sbrn = 0x20;
 
        ehci_reset(ehci);
@@ -191,12 +188,8 @@ static int ehci_mxc_drv_probe(struct platform_device *pdev)
                clk_enable(priv->ahbclk);
        }
 
-       /* set USBMODE to host mode */
-       temp = readl(hcd->regs + USBMODE_OFFSET);
-       writel(temp | USBMODE_CM_HOST, hcd->regs + USBMODE_OFFSET);
-
        /* set up the PORTSCx register */
-       writel(pdata->portsc, hcd->regs + PORTSC_OFFSET);
+       ehci_writel(ehci, pdata->portsc, &ehci->regs->port_status[0]);
        mdelay(10);
 
        /* setup specific usb hw */