drm/amd/display: Reset plane for anything that's not a FAST update

[Why]
MEDIUM or FULL updates can require global validation or affect
bandwidth. By treating these all simply as surface updates we aren't
actually passing this through DC global validation.

[How]
There's currently no way to pass surface updates through DC global
validation, nor do I think it's a good idea to change the interface
to accept these.

DC global validation itself is currently stateless, and we can move
our update type checking to be stateless as well by duplicating DC
surface checks in DM based on DRM properties.

We wanted to rely on DC automatically determining this since DC knows
best, but DM is ultimately what fills in everything into DC plane
state so it does need to know as well.

There are basically only three paths that we exercise in DM today:

1) Cursor (async update)
2) Pageflip (fast update)
3) Full pipe programming (medium/full updates)

Which means that anything that's more than a pageflip really needs to
go down path #3.

So this change duplicates all the surface update checks based on DRM
state instead inside of should_reset_plane().

Next step is dropping dm_determine_update_type_for_commit and we no
longer require the old DC state at all for global validation.

Optimization can come later so we don't reset DC planes at all for
MEDIUM udpates and avoid validation, but we might require some extra
checks in DM to achieve this.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index c3ac47b835d6baa67b8dbfed723a1a46d6a322b4..0b23c422002067386d6cf46ef90d204fa15baac6 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -8261,6 +8261,31 @@ static bool should_reset_plane(struct drm_atomic_state *state,
                if (old_other_state->crtc != new_other_state->crtc)
                        return true;
 
+               /* Src/dst size and scaling updates. */
+               if (old_other_state->src_w != new_other_state->src_w ||
+                   old_other_state->src_h != new_other_state->src_h ||
+                   old_other_state->crtc_w != new_other_state->crtc_w ||
+                   old_other_state->crtc_h != new_other_state->crtc_h)
+                       return true;
+
+               /* Rotation / mirroring updates. */
+               if (old_other_state->rotation != new_other_state->rotation)
+                       return true;
+
+               /* Blending updates. */
+               if (old_other_state->pixel_blend_mode !=
+                   new_other_state->pixel_blend_mode)
+                       return true;
+
+               /* Alpha updates. */
+               if (old_other_state->alpha != new_other_state->alpha)
+                       return true;
+
+               /* Colorspace changes. */
+               if (old_other_state->color_range != new_other_state->color_range ||
+                   old_other_state->color_encoding != new_other_state->color_encoding)
+                       return true;
+
                /* Framebuffer checks fall at the end. */
                if (!old_other_state->fb || !new_other_state->fb)
                        continue;