drm/amdgpu: fix VA hole handling on Vega10 v3

Similar to the CPU address space the VA on Vega10 has a hole in it.

v2: use dev_dbg instead of dev_err
v3: add some more comments to explain how the hw works

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
CC: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index 5e89d7a7178f4e8dc799b1555a4ce3093c0c25cd..93d3cef6650309317e100603be99963ffab62f8a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -870,8 +870,8 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev,
                        struct amdgpu_bo_va_mapping *m;
                        struct amdgpu_bo *aobj = NULL;
                        struct amdgpu_cs_chunk *chunk;
+                       uint64_t offset, va_start;
                        struct amdgpu_ib *ib;
-                       uint64_t offset;
                        uint8_t *kptr;
 
                        chunk = &p->chunks[i];
@@ -881,14 +881,14 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev,
                        if (chunk->chunk_id != AMDGPU_CHUNK_ID_IB)
                                continue;
 
-                       r = amdgpu_cs_find_mapping(p, chunk_ib->va_start,
-                                                  &aobj, &m);
+                       va_start = chunk_ib->va_start & AMDGPU_VA_HOLE_MASK;
+                       r = amdgpu_cs_find_mapping(p, va_start, &aobj, &m);
                        if (r) {
                                DRM_ERROR("IB va_start is invalid\n");
                                return r;
                        }
 
-                       if ((chunk_ib->va_start + chunk_ib->ib_bytes) >
+                       if ((va_start + chunk_ib->ib_bytes) >
                            (m->last + 1) * AMDGPU_GPU_PAGE_SIZE) {
                                DRM_ERROR("IB va_start+ib_bytes is invalid\n");
                                return -EINVAL;
@@ -901,7 +901,7 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev,
                        }
 
                        offset = m->start * AMDGPU_GPU_PAGE_SIZE;
-                       kptr += chunk_ib->va_start - offset;
+                       kptr += va_start - offset;
 
                        memcpy(ib->ptr, kptr, chunk_ib->ib_bytes);
                        amdgpu_bo_kunmap(aobj);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index c16579287aeeed3056e8d875a99b17668d0bddeb..59c9facf9bd717cff1c41800d5a64b54e10f10eb 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -564,6 +564,17 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
                return -EINVAL;
        }
 
+       if (args->va_address >= AMDGPU_VA_HOLE_START &&
+           args->va_address < AMDGPU_VA_HOLE_END) {
+               dev_dbg(&dev->pdev->dev,
+                       "va_address 0x%LX is in VA hole 0x%LX-0x%LX\n",
+                       args->va_address, AMDGPU_VA_HOLE_START,
+                       AMDGPU_VA_HOLE_END);
+               return -EINVAL;
+       }
+
+       args->va_address &= AMDGPU_VA_HOLE_MASK;
+
        if ((args->flags & ~valid_flags) && (args->flags & ~prt_flags)) {
                dev_err(&dev->pdev->dev, "invalid flags combination 0x%08X\n",
                        args->flags);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index f55021ae788dd5e66d7322687a38e18abc05945b..2614269c4d7fda3a77e2a546f00d34d0c4c8ccc8 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -578,7 +578,9 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
                if (amdgpu_sriov_vf(adev))
                        dev_info.ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION;
                dev_info.virtual_address_offset = AMDGPU_VA_RESERVED_SIZE;
-               dev_info.virtual_address_max = (uint64_t)adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;
+               dev_info.virtual_address_max =
+                       min(adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE,
+                           AMDGPU_VA_HOLE_START);
                dev_info.virtual_address_alignment = max((int)PAGE_SIZE, AMDGPU_GPU_PAGE_SIZE);
                dev_info.pte_fragment_size = (1 << adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE;
                dev_info.gart_page_size = AMDGPU_GPU_PAGE_SIZE;

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index e8f8896d18db7709a7f17d14d0177440f07c88a3..c80d45dd2bd31b454fbfac9728f9704b698288c2 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -96,6 +96,19 @@ struct amdgpu_bo_list_entry;
 /* hardcode that limit for now */
 #define AMDGPU_VA_RESERVED_SIZE                        (8ULL << 20)
 
+/* VA hole for 48bit addresses on Vega10 */
+#define AMDGPU_VA_HOLE_START                   0x0000800000000000ULL
+#define AMDGPU_VA_HOLE_END                     0xffff800000000000ULL
+
+/*
+ * Hardware is programmed as if the hole doesn't exists with start and end
+ * address values.
+ *
+ * This mask is used to remove the upper 16bits of the VA and so come up with
+ * the linear addr value.
+ */
+#define AMDGPU_VA_HOLE_MASK                    0x0000ffffffffffffULL
+
 /* max vmids dedicated for process */
 #define AMDGPU_VM_MAX_RESERVED_VMID    1