drm/i915: Move i915_gem_chipset_flush to intel_gt

This aligns better with the rest of restructuring.

v2:
 * Move call out of line. (Chris)

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190621070811.7006-24-tvrtko.ursulin@linux.intel.com

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 5fae0e50aad06881a53bc70c708ceccb7cbfe7d7..cf8edb6822eed476911e118850cae91524b40d78 100644 (file)
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -16,6 +16,7 @@
 
 #include "gem/i915_gem_ioctls.h"
 #include "gt/intel_context.h"
+#include "gt/intel_gt.h"
 #include "gt/intel_gt_pm.h"
 
 #include "i915_gem_ioctls.h"
@@ -994,7 +995,7 @@ static void reloc_gpu_flush(struct reloc_cache *cache)
        __i915_gem_object_flush_map(cache->rq->batch->obj, 0, cache->rq_size);
        i915_gem_object_unpin_map(cache->rq->batch->obj);
 
-       i915_gem_chipset_flush(cache->rq->i915);
+       intel_gt_chipset_flush(cache->rq->engine->gt);
 
        i915_request_add(cache->rq);
        cache->rq = NULL;
@@ -1954,7 +1955,7 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
        eb->exec = NULL;
 
        /* Unconditionally flush any chipset caches (for streaming writes). */
-       i915_gem_chipset_flush(eb->i915);
+       intel_gt_chipset_flush(eb->engine->gt);
        return 0;
 
 err_skip:

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_phys.c b/drivers/gpu/drm/i915/gem/i915_gem_phys.c
index 2deac933cf596d419483c5c3205833281b919daf..7b900ee4ed8d9de7d4465cefb1d07d6f25065823 100644 (file)
--- a/drivers/gpu/drm/i915/gem/i915_gem_phys.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_phys.c
@@ -13,6 +13,7 @@
 #include <drm/drm_legacy.h> /* for drm_pci.h! */
 #include <drm/drm_pci.h>
 
+#include "gt/intel_gt.h"
 #include "i915_drv.h"
 #include "i915_gem_object.h"
 #include "i915_scatterlist.h"
@@ -60,7 +61,7 @@ static int i915_gem_object_get_pages_phys(struct drm_i915_gem_object *obj)
                vaddr += PAGE_SIZE;
        }
 
-       i915_gem_chipset_flush(to_i915(obj->base.dev));
+       intel_gt_chipset_flush(&to_i915(obj->base.dev)->gt);
 
        st = kmalloc(sizeof(*st), GFP_KERNEL);
        if (!st) {

diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
index b74729b6f353811c233b13e5cbf1170c8eecf660..dcf60a8c229e5e40c23c19ec99821f0ec11120f6 100644 (file)
--- a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
@@ -10,6 +10,8 @@
 
 #include "gem/i915_gem_pm.h"
 
+#include "gt/intel_gt.h"
+
 #include "igt_gem_utils.h"
 #include "mock_context.h"
 
@@ -926,7 +928,7 @@ gpu_write_dw(struct i915_vma *vma, u64 offset, u32 val)
        }
 
        *cmd = MI_BATCH_BUFFER_END;
-       i915_gem_chipset_flush(i915);
+       intel_gt_chipset_flush(vma->vm->gt);
 
        i915_gem_object_unpin_map(obj);
 

diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 4fd9977fe284808fcba1b8ffe9a21de6903da424..f632b7b5b49024bb4d168073e89923ad756c0034 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -180,7 +180,7 @@ void intel_gt_flush_ggtt_writes(struct intel_gt *gt)
        if (INTEL_INFO(i915)->has_coherent_ggtt)
                return;
 
-       i915_gem_chipset_flush(i915);
+       intel_gt_chipset_flush(gt);
 
        with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
                struct intel_uncore *uncore = gt->uncore;
@@ -191,3 +191,10 @@ void intel_gt_flush_ggtt_writes(struct intel_gt *gt)
                spin_unlock_irq(&uncore->lock);
        }
 }
+
+void intel_gt_chipset_flush(struct intel_gt *gt)
+{
+       wmb();
+       if (INTEL_GEN(gt->i915) < 6)
+               intel_gtt_chipset_flush();
+}

diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
index 6073f3617caa0f74dbe4d65b29fe6c5966130de7..fb064758b591488ea00034881da6f87fa9dd2911 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -18,5 +18,6 @@ void intel_gt_clear_error_registers(struct intel_gt *gt,
                                    intel_engine_mask_t engine_mask);
 
 void intel_gt_flush_ggtt_writes(struct intel_gt *gt);
+void intel_gt_chipset_flush(struct intel_gt *gt);
 
 #endif /* __INTEL_GT_H__ */

diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index 1ee4c923044fc3ccc536da555d08fad40d10e999..2d773f11e203b10d2ec1f7eafa3f25f9b0681ecb 100644 (file)
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -25,6 +25,7 @@
 #include <linux/kthread.h>
 
 #include "gem/i915_gem_context.h"
+#include "gt/intel_gt.h"
 #include "intel_engine_pm.h"
 
 #include "i915_selftest.h"
@@ -43,6 +44,7 @@
 
 struct hang {
        struct drm_i915_private *i915;
+       struct intel_gt *gt;
        struct drm_i915_gem_object *hws;
        struct drm_i915_gem_object *obj;
        struct i915_gem_context *ctx;
@@ -135,6 +137,8 @@ hang_create_request(struct hang *h, struct intel_engine_cs *engine)
        u32 *batch;
        int err;
 
+       h->gt = engine->gt;
+
        if (i915_gem_object_is_active(h->obj)) {
                struct drm_i915_gem_object *obj;
                void *vaddr;
@@ -242,7 +246,7 @@ hang_create_request(struct hang *h, struct intel_engine_cs *engine)
                *batch++ = lower_32_bits(vma->node.start);
        }
        *batch++ = MI_BATCH_BUFFER_END; /* not reached */
-       i915_gem_chipset_flush(h->i915);
+       intel_gt_chipset_flush(engine->gt);
 
        if (rq->engine->emit_init_breadcrumb) {
                err = rq->engine->emit_init_breadcrumb(rq);
@@ -276,7 +280,9 @@ static u32 hws_seqno(const struct hang *h, const struct i915_request *rq)
 static void hang_fini(struct hang *h)
 {
        *h->batch = MI_BATCH_BUFFER_END;
-       i915_gem_chipset_flush(h->i915);
+
+       if (h->gt)
+               intel_gt_chipset_flush(h->gt);
 
        i915_gem_object_unpin_map(h->obj);
        i915_gem_object_put(h->obj);
@@ -333,7 +339,7 @@ static int igt_hang_sanitycheck(void *arg)
                i915_request_get(rq);
 
                *h.batch = MI_BATCH_BUFFER_END;
-               i915_gem_chipset_flush(i915);
+               intel_gt_chipset_flush(engine->gt);
 
                i915_request_add(rq);
 
@@ -1509,7 +1515,7 @@ static int igt_reset_queue(void *arg)
                pr_info("%s: Completed %d resets\n", engine->name, count);
 
                *h.batch = MI_BATCH_BUFFER_END;
-               i915_gem_chipset_flush(i915);
+               intel_gt_chipset_flush(engine->gt);
 
                i915_request_put(prev);
 

diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index 9eaf030affd0f43db998da9d4445ca810e33ef2d..931bc33fc46dee83237a9d2a5d5d64f74a4740bd 100644 (file)
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -5,6 +5,7 @@
  */
 
 #include "gem/i915_gem_pm.h"
+#include "gt/intel_gt.h"
 #include "i915_selftest.h"
 #include "intel_reset.h"
 
@@ -542,7 +543,7 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx,
 
                i915_gem_object_flush_map(batch->obj);
                i915_gem_object_unpin_map(batch->obj);
-               i915_gem_chipset_flush(ctx->i915);
+               intel_gt_chipset_flush(engine->gt);
 
                rq = igt_request_alloc(ctx, engine);
                if (IS_ERR(rq)) {
@@ -806,7 +807,7 @@ static int scrub_whitelisted_registers(struct i915_gem_context *ctx,
        *cs++ = MI_BATCH_BUFFER_END;
 
        i915_gem_object_flush_map(batch->obj);
-       i915_gem_chipset_flush(ctx->i915);
+       intel_gt_chipset_flush(engine->gt);
 
        rq = igt_request_alloc(ctx, engine);
        if (IS_ERR(rq)) {

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1fd0a73b4b9a278e9b0f461bb733a90c0a711203..b574aea2358185ae9e40a7ccac7b6e2f1b02335d 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2599,14 +2599,6 @@ int __must_check i915_gem_evict_for_node(struct i915_address_space *vm,
                                         unsigned int flags);
 int i915_gem_evict_vm(struct i915_address_space *vm);
 
-/* belongs in i915_gem_gtt.h */
-static inline void i915_gem_chipset_flush(struct drm_i915_private *dev_priv)
-{
-       wmb();
-       if (INTEL_GEN(dev_priv) < 6)
-               intel_gtt_chipset_flush();
-}
-
 /* i915_gem_stolen.c */
 int i915_gem_stolen_insert_node(struct drm_i915_private *dev_priv,
                                struct drm_mm_node *node, u64 size,

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index a9189807cd7177e5fb92a45778ba8073b3115ad5..ae36955d819a38daab9dc43f469147d5f8a99db3 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -47,6 +47,7 @@
 #include "gem/i915_gem_pm.h"
 #include "gem/i915_gemfs.h"
 #include "gt/intel_engine_pm.h"
+#include "gt/intel_gt.h"
 #include "gt/intel_gt_pm.h"
 #include "gt/intel_mocs.h"
 #include "gt/intel_reset.h"
@@ -142,7 +143,7 @@ i915_gem_phys_pwrite(struct drm_i915_gem_object *obj,
                return -EFAULT;
 
        drm_clflush_virt_range(vaddr, args->size);
-       i915_gem_chipset_flush(to_i915(obj->base.dev));
+       intel_gt_chipset_flush(&to_i915(obj->base.dev)->gt);
 
        intel_fb_obj_flush(obj, ORIGIN_CPU);
        return 0;

diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests/i915_request.c
index 1a5b9e284ca96ab443ea6ef7bdebdc713cc91c3c..0fdf948a93a0307027175d1c36fd82be619b3333 100644 (file)
--- a/drivers/gpu/drm/i915/selftests/i915_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_request.c
@@ -27,6 +27,8 @@
 #include "gem/i915_gem_pm.h"
 #include "gem/selftests/mock_context.h"
 
+#include "gt/intel_gt.h"
+
 #include "i915_random.h"
 #include "i915_selftest.h"
 #include "igt_live_test.h"
@@ -624,7 +626,7 @@ static struct i915_vma *empty_batch(struct drm_i915_private *i915)
        __i915_gem_object_flush_map(obj, 0, 64);
        i915_gem_object_unpin_map(obj);
 
-       i915_gem_chipset_flush(i915);
+       intel_gt_chipset_flush(&i915->gt);
 
        vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
        if (IS_ERR(vma)) {
@@ -793,7 +795,7 @@ static struct i915_vma *recursive_batch(struct drm_i915_private *i915)
        __i915_gem_object_flush_map(obj, 0, 64);
        i915_gem_object_unpin_map(obj);
 
-       i915_gem_chipset_flush(i915);
+       intel_gt_chipset_flush(&i915->gt);
 
        return vma;
 
@@ -811,7 +813,7 @@ static int recursive_batch_resolve(struct i915_vma *batch)
                return PTR_ERR(cmd);
 
        *cmd = MI_BATCH_BUFFER_END;
-       i915_gem_chipset_flush(batch->vm->i915);
+       intel_gt_chipset_flush(batch->vm->gt);
 
        i915_gem_object_unpin_map(batch->obj);
 
@@ -1033,7 +1035,7 @@ out_request:
                                              I915_MAP_WC);
                if (!IS_ERR(cmd)) {
                        *cmd = MI_BATCH_BUFFER_END;
-                       i915_gem_chipset_flush(i915);
+                       intel_gt_chipset_flush(engine->gt);
 
                        i915_gem_object_unpin_map(request[id]->batch->obj);
                }

diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
index 1e59b543cf277de0efe75aab740fe08d257a6706..0c1f65262a63e820ea6a1ba9dd686134ae4cf044 100644 (file)
--- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
+++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
@@ -3,6 +3,7 @@
  *
  * Copyright © 2018 Intel Corporation
  */
+#include "gt/intel_gt.h"
 
 #include "gem/selftests/igt_gem_utils.h"
 
@@ -94,6 +95,8 @@ igt_spinner_create_request(struct igt_spinner *spin,
        u32 *batch;
        int err;
 
+       spin->gt = engine->gt;
+
        vma = i915_vma_instance(spin->obj, ctx->vm, NULL);
        if (IS_ERR(vma))
                return ERR_CAST(vma);
@@ -138,7 +141,7 @@ igt_spinner_create_request(struct igt_spinner *spin,
        *batch++ = upper_32_bits(vma->node.start);
        *batch++ = MI_BATCH_BUFFER_END; /* not reached */
 
-       i915_gem_chipset_flush(spin->i915);
+       intel_gt_chipset_flush(engine->gt);
 
        if (engine->emit_init_breadcrumb &&
            rq->timeline->has_initial_breadcrumb) {
@@ -172,7 +175,7 @@ hws_seqno(const struct igt_spinner *spin, const struct i915_request *rq)
 void igt_spinner_end(struct igt_spinner *spin)
 {
        *spin->batch = MI_BATCH_BUFFER_END;
-       i915_gem_chipset_flush(spin->i915);
+       intel_gt_chipset_flush(spin->gt);
 }
 
 void igt_spinner_fini(struct igt_spinner *spin)

diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.h b/drivers/gpu/drm/i915/selftests/igt_spinner.h
index 34a88ac9b47ab99a55161a252c856274b6da5168..1bfc39efa7738de2bdd2f39b1f1eabd46f64789c 100644 (file)
--- a/drivers/gpu/drm/i915/selftests/igt_spinner.h
+++ b/drivers/gpu/drm/i915/selftests/igt_spinner.h
@@ -14,8 +14,11 @@
 #include "i915_request.h"
 #include "i915_selftest.h"
 
+struct intel_gt;
+
 struct igt_spinner {
        struct drm_i915_private *i915;
+       struct intel_gt *gt;
        struct drm_i915_gem_object *hws;
        struct drm_i915_gem_object *obj;
        u32 *batch;