MIPS: Loogson: Make enum loongson_cpu_type more clear

Sort enum loongson_cpu_type in a more reasonable manner, this makes the
CPU names more clear and extensible. Those already defined enum values
are renamed to Legacy_* for compatibility.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: John Crispin <john@phrozen.org>
Cc: Steven J . Hill <Steven.Hill@cavium.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16591/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/include/asm/mach-loongson64/boot_param.h b/arch/mips/include/asm/mach-loongson64/boot_param.h
index d3f3258b7cd4a82b32776e030b00951fba8c0281..9f9bb9c5378528c27b7f2d82b5913999c16a0bac 100644 (file)
--- a/arch/mips/include/asm/mach-loongson64/boot_param.h
+++ b/arch/mips/include/asm/mach-loongson64/boot_param.h
@@ -27,12 +27,22 @@ struct efi_memory_map_loongson {
 } __packed;
 
 enum loongson_cpu_type {
-       Loongson_2E = 0,
-       Loongson_2F = 1,
-       Loongson_3A = 2,
-       Loongson_3B = 3,
-       Loongson_1A = 4,
-       Loongson_1B = 5
+       Legacy_2E = 0x0,
+       Legacy_2F = 0x1,
+       Legacy_3A = 0x2,
+       Legacy_3B = 0x3,
+       Legacy_1A = 0x4,
+       Legacy_1B = 0x5,
+       Legacy_2G = 0x6,
+       Legacy_2H = 0x7,
+       Loongson_1A = 0x100,
+       Loongson_1B = 0x101,
+       Loongson_2E = 0x200,
+       Loongson_2F = 0x201,
+       Loongson_2G = 0x202,
+       Loongson_2H = 0x203,
+       Loongson_3A = 0x300,
+       Loongson_3B = 0x301
 };
 
 /*

diff --git a/arch/mips/loongson64/common/env.c b/arch/mips/loongson64/common/env.c
index 4707abfe9d641dc5a970bfba73180ff9ea30cbe6..1e8a955ae5a820e37a5bdb23e970e6356693ccb9 100644 (file)
--- a/arch/mips/loongson64/common/env.c
+++ b/arch/mips/loongson64/common/env.c
@@ -90,7 +90,9 @@ void __init prom_init_env(void)
 
        cpu_clock_freq = ecpu->cpu_clock_freq;
        loongson_sysconf.cputype = ecpu->cputype;
-       if (ecpu->cputype == Loongson_3A) {
+       switch (ecpu->cputype) {
+       case Legacy_3A:
+       case Loongson_3A:
                loongson_sysconf.cores_per_node = 4;
                loongson_sysconf.cores_per_package = 4;
                smp_group[0] = 0x900000003ff01000;
@@ -111,7 +113,9 @@ void __init prom_init_env(void)
                loongson_freqctrl[3] = 0x900030001fe001d0;
                loongson_sysconf.ht_control_base = 0x90000EFDFB000000;
                loongson_sysconf.workarounds = WORKAROUND_CPUFREQ;
-       } else if (ecpu->cputype == Loongson_3B) {
+               break;
+       case Legacy_3B:
+       case Loongson_3B:
                loongson_sysconf.cores_per_node = 4; /* One chip has 2 nodes */
                loongson_sysconf.cores_per_package = 8;
                smp_group[0] = 0x900000003ff01000;
@@ -132,7 +136,8 @@ void __init prom_init_env(void)
                loongson_freqctrl[3] = 0x900060001fe001d0;
                loongson_sysconf.ht_control_base = 0x90001EFDFB000000;
                loongson_sysconf.workarounds = WORKAROUND_CPUHOTPLUG;
-       } else {
+               break;
+       default:
                loongson_sysconf.cores_per_node = 1;
                loongson_sysconf.cores_per_package = 1;
                loongson_chipcfg[0] = 0x900000001fe00180;