drm/amdgpu: ensure no PCIe peer access for CPU XGMI iolinks

[Why] Devices with CPU XGMI iolink do not support PCIe peer access.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index f095a2513affc2a58150e9213400e92ab237dadc..1400abee9f402e3785374516a21105d7120a7ea7 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -5524,7 +5524,8 @@ bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev,
                ~*peer_adev->dev->dma_mask : ~((1ULL << 32) - 1);
        resource_size_t aper_limit =
                adev->gmc.aper_base + adev->gmc.aper_size - 1;
-       bool p2p_access = !(pci_p2pdma_distance_many(adev->pdev,
+       bool p2p_access = !adev->gmc.xgmi.connected_to_cpu &&
+                         !(pci_p2pdma_distance_many(adev->pdev,
                                        &peer_adev->dev, 1, true) < 0);
 
        return pcie_p2p && p2p_access && (adev->gmc.visible_vram_size &&