drm/amdgpu: fix to clear ASIC INIT COMPLETE bit on resuming phase

ASIC_INIT_COMPLETE bit must be cleared during S3 resuming phase,
because VBIOS will check the bit to decide if execute ASIC_Init
posting via kernel driver.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
index ad4329922f7953ad7b6a032644832ad757d80598..1cf78f4dd339f93ddd971088ec42a5146b9820fe 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
@@ -1727,6 +1727,12 @@ void amdgpu_atombios_scratch_regs_restore(struct amdgpu_device *adev)
 {
        int i;
 
+       /*
+        * VBIOS will check ASIC_INIT_COMPLETE bit to decide if
+        * execute ASIC_Init posting via driver
+        */
+       adev->bios_scratch[7] &= ~ATOM_S7_ASIC_INIT_COMPLETE_MASK;
+
        for (i = 0; i < AMDGPU_BIOS_NUM_SCRATCH; i++)
                WREG32(mmBIOS_SCRATCH_0 + i, adev->bios_scratch[i]);
 }

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
index 4b9abd68e04f85eb6e837e7d884a25013e7d9369..d735cd1807b34dcf00bb61d91bd30ea70c4635b3 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c
@@ -26,6 +26,7 @@
 #include "atomfirmware.h"
 #include "amdgpu_atomfirmware.h"
 #include "atom.h"
+#include "atombios.h"
 
 #define get_index_into_master_table(master_table, table_name) (offsetof(struct master_table, table_name) / sizeof(uint16_t))
 
@@ -77,6 +78,12 @@ void amdgpu_atomfirmware_scratch_regs_restore(struct amdgpu_device *adev)
 {
        int i;
 
+       /*
+        * VBIOS will check ASIC_INIT_COMPLETE bit to decide if
+        * execute ASIC_Init posting via driver
+        */
+       adev->bios_scratch[7] &= ~ATOM_S7_ASIC_INIT_COMPLETE_MASK;
+
        for (i = 0; i < AMDGPU_BIOS_NUM_SCRATCH; i++)
                WREG32(adev->bios_scratch_reg_offset + i, adev->bios_scratch[i]);
 }