]> git.baikalelectronics.ru Git - uboot.git/commitdiff
arm: socfpga: stratix10: add CONFIG_SPL_TARGET
authorDalon Westergreen <dwesterg@gmail.com>
Mon, 10 Sep 2018 17:28:48 +0000 (10:28 -0700)
committerMarek Vasut <marex@denx.de>
Sat, 15 Sep 2018 01:17:01 +0000 (03:17 +0200)
Stratix10 combines the u-boot-spl image into the fpga configuration
bitstream so that the SDM can load the processors memory.  This
process requires a hex format of the u-boot-spl image.
CONFIG_SPL_TARGET is set to "spl/u-boot-spl.hex"

Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
include/configs/socfpga_stratix10_socdk.h

index b58f478004761b9f648bcf31cf9fe3a0c2e22a6e..91315a003152b8ec11e36eda4e9e69d43865aca9 100644 (file)
@@ -202,6 +202,7 @@ unsigned int cm_get_l4_sys_free_clk_hz(void);
  * 0x8000_0000 ...... End of SDRAM_1 (assume 2GB)
  *
  */
+#define CONFIG_SPL_TARGET              "spl/u-boot-spl.hex"
 #define CONFIG_SPL_TEXT_BASE           CONFIG_SYS_INIT_RAM_ADDR
 #define CONFIG_SPL_MAX_SIZE            CONFIG_SYS_INIT_RAM_SIZE
 #define CONFIG_SPL_STACK               CONFIG_SYS_INIT_SP_ADDR