- loads U-Boot or (in falcon mode) Linux
-
Configuration Options:
----------------------
#include "sys_env_lib.h"
#include "ctrl_pex.h"
-
-
/*
* serdes_seq_db - holds all serdes sequences, their size and the
* relevant index in the data array initialized in serdes_seq_init
#define XCHAL_DCACHE_IS_WRITEBACK 1 /* writeback feature */
-
-
/****************************************************************************
Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code
****************************************************************************/
#define XTHAL_SAS_ALL 0xFFFF /* include all default NCP contents */
-
/* Macro to save all non-coprocessor (extra) custom TIE and optional state
* (not including zero-overhead loop registers).
* Save area ptr (clobbered): ptr (1 byte aligned)
.endif
.endm // xchal_ncp_load
-
-
#define XCHAL_NCP_NUM_ATMPS 2
-
#define XCHAL_SA_NUM_ATMPS 2
#endif /*_XTENSA_CORE_TIE_ASM_H*/
#define XCHAL_HAVE_PREFETCH 0 /* PREFCTL register */
-
-
/****************************************************************************
Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code
****************************************************************************/
-
#ifndef XTENSA_HAL_NON_PRIVILEGED_ONLY
/*----------------------------------------------------------------------
| ((ccuse) & XTHAL_SAS_ANYCC) \
| ((abi) & XTHAL_SAS_ANYABI) )
-
-
/*
* Macro to save all non-coprocessor (extra) custom TIE and optional state
* (not including zero-overhead loop registers).
#define XCHAL_NCP_NUM_ATMPS 1
-
-
#define XCHAL_SA_NUM_ATMPS 1
#endif /*_XTENSA_CORE_TIE_ASM_H*/
#define XCHAL_HAVE_DCACHE_DYN_WAYS 0 /* Dcache dynamic way support */
-
-
/****************************************************************************
Parameters Useful for PRIVILEGED (Supervisory or Non-Virtualized) Code
****************************************************************************/
-
#ifndef XTENSA_HAL_NON_PRIVILEGED_ONLY
/*----------------------------------------------------------------------
.endm
-
.macro ___flush_invalidate_dcache_range ar as at
#if XCHAL_DCACHE_SIZE
.endm
-
.macro ___flush_invalidate_dcache_page ar as
#if XCHAL_DCACHE_SIZE
pbsp->clk_adjust, pbsp->wrlvl_start, pbsp->wrlvl_ctl_2,
pbsp->wrlvl_ctl_3);
-
-
popts->half_strength_driver_enable = 0;
/*
* Write leveling override
0xE8000000 0xE801FFFF RCW (current bank) 128KB
-
Software configurations and board settings
------------------------------------------
1. NOR boot:
//
};
-
-
#include "xil_io.h"
unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;
ret = ps7_config (ps7_ddr_init_data);
if (ret != PS7_INIT_SUCCESS) return ret;
-
-
// Peripherals init
ret = ps7_config (ps7_peripherals_init_data);
if (ret != PS7_INIT_SUCCESS) return ret;
//
};
-
-
#include "xil_io.h"
unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;
ret = ps7_config (ps7_ddr_init_data);
if (ret != PS7_INIT_SUCCESS) return ret;
-
-
// Peripherals init
ret = ps7_config (ps7_peripherals_init_data);
if (ret != PS7_INIT_SUCCESS) return ret;
//
};
-
-
#include "xil_io.h"
unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;
ret = ps7_config (ps7_ddr_init_data);
if (ret != PS7_INIT_SUCCESS) return ret;
-
-
// Peripherals init
ret = ps7_config (ps7_peripherals_init_data);
if (ret != PS7_INIT_SUCCESS) return ret;
//
};
-
-
#include "xil_io.h"
unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0;
ret = ps7_config (ps7_ddr_init_data);
if (ret != PS7_INIT_SUCCESS) return ret;
-
-
// Peripherals init
ret = ps7_config (ps7_peripherals_init_data);
if (ret != PS7_INIT_SUCCESS) return ret;
} /* bedbug_puts */
-
/* ======================================================================
* Initialize the bug_ctx structure used by the bedbug debugger. This is
* specific to the CPU since each has different debug registers and
} /* bedbug_init */
-
/* ======================================================================
* Entry point from the interpreter to the disassembler. Repeated calls
* will resume from the last disassembled address.
} /* do_bedbug_breakpoint */
-
/* ======================================================================
* Called from the CPU-specific breakpoint handling routine. Enter a
* mini main loop until the stopped flag is cleared from the breakpoint
} /* bedbug_main_loop */
-
/* ======================================================================
* Interpreter command to continue from a breakpoint. Just clears the
* stopped flag in the context so that the breakpoint routine will
possible to set large enough default buffer (8 MiB @ BBB)
-
FIT image format for download
-----------------------------
where "u-boot.bin" is the DFU entity name to be stored.
-
To do
-----
in drivers/tee/optee/optee_smc.h
-
Example:
firmware {
optee {
return !!readb(bank->base + (BIT(gpio + 2)));
}
-
-
static const struct dm_gpio_ops gpio_hi6220_ops = {
.direction_input = hi6220_gpio_direction_input,
.direction_output = hi6220_gpio_direction_output,
bus_i2c_set_bus_speed(&mxc_i2c_buses[index], speed);
}
-
-
/*
* Init I2C Bus
*/
return rval ? -EIO : 0;
}
-
-
/**
* nand_write_skip_bad:
*
mdelay(20);
}
-
-
E1000_WRITE_REG(hw, TCTL, tctl);
-
-
}
/**
// It's inefficient; you might want to c&p it and optimize it.
-
//////////////////////////////////////////////////////////////////////////////
//
// NEW TEXTURE BAKING API
#define BTRFS_STRING_ITEM_KEY 253
-
/* 32 bytes in various csum fields */
#define BTRFS_CSUM_SIZE 32
#define CONFIG_ENV_RANGE (4 * CONFIG_SYS_ENV_SECT_SIZE)
-
#undef COMMON_ENV_DFU_ARGS
#define COMMON_ENV_DFU_ARGS "dfu_args=run bootargs_defaults;" \
"setenv bootargs ${bootargs};" \
MC_RSP_OP(cmd, 2, 0, 64, uint64_t, state->options);\
} while (0)
-
-
/* cmd, param, offset, width, type, arg_name */
#define DPNI_CMD_SET_PRIMARY_MAC_ADDR(cmd, mac_addr) \
do { \
} flstate_t;
-
/* NOTE: confusingly, this can be used to refer to more than one chip at a time,
if they're interleaved. This can even refer to individual partitions on
the same physical chip when present. */
#define UART_ACR_ASREN 0x80 /* Additional status enable */
-
/*
* These definitions are for the RSA-DV II/S card, from
*
projects / uboot.git / commitdiff