drm/msm/adreno: Make adreno quirks not overwrite each other

commit 13ef096e342b00e30b95a90c6c13eee1f0bec4c5 upstream.

So far the adreno quirks have all been assigned with an OR operator,
which is problematic, because they were assigned consecutive integer
values, which makes checking them with an AND operator kind of no bueno..

Switch to using BIT(n) so that only the quirks that the programmer chose
are taken into account when evaluating info->quirks & ADRENO_QUIRK_...

Fixes: 763af3410f28 ("drm/msm/adreno: Add A540 support")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/516456/
Link: https://lore.kernel.org/r/20230102100201.77286-1-konrad.dybcio@linaro.org
Signed-off-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index c7441fb8313e4d59f17e2d30cd21e291a71be4fb..e1a8989b78358b40731b2dd9d4bc0e405238a3d0 100644 (file)
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -47,11 +47,9 @@ enum {
        ADRENO_FW_MAX,
 };
 
-enum adreno_quirks {
-       ADRENO_QUIRK_TWO_PASS_USE_WFI = 1,
-       ADRENO_QUIRK_FAULT_DETECT_MASK = 2,
-       ADRENO_QUIRK_LMLOADKILL_DISABLE = 3,
-};
+#define ADRENO_QUIRK_TWO_PASS_USE_WFI          BIT(0)
+#define ADRENO_QUIRK_FAULT_DETECT_MASK         BIT(1)
+#define ADRENO_QUIRK_LMLOADKILL_DISABLE                BIT(2)
 
 struct adreno_rev {
        uint8_t  core;
@@ -74,7 +72,7 @@ struct adreno_info {
        const char *name;
        const char *fw[ADRENO_FW_MAX];
        uint32_t gmem;
-       enum adreno_quirks quirks;
+       u64 quirks;
        struct msm_gpu *(*init)(struct drm_device *dev);
        const char *zapfw;
        u32 inactive_period;