drm/i915: Add a default case in gen7 hwsp switch-case

Gen7 won't get any new engines, and we already added VCS2 there to just
silence gcc's not handled in switch warnings.

Use a default case instead, otherwise we will need to keep adding extra
cases if changes happen in the future.

v2: Since reaching the default case is impossible, use GEM_BUG_ON (Chris).

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170830180115.907-1-michel.thierry@intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index cdf084ef5aaeaf5e575d6e607577c2af03b01ab2..268342433a8e55b48e80d8eaf13d34f29e62391c 100644 (file)
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -402,17 +402,18 @@ static void intel_ring_setup_status_page(struct intel_engine_cs *engine)
         */
        if (IS_GEN7(dev_priv)) {
                switch (engine->id) {
+               /*
+                * No more rings exist on Gen7. Default case is only to shut up
+                * gcc switch check warning.
+                */
+               default:
+                       GEM_BUG_ON(engine->id);
                case RCS:
                        mmio = RENDER_HWS_PGA_GEN7;
                        break;
                case BCS:
                        mmio = BLT_HWS_PGA_GEN7;
                        break;
-               /*
-                * VCS2 actually doesn't exist on Gen7. Only shut up
-                * gcc switch check warning
-                */
-               case VCS2:
                case VCS:
                        mmio = BSD_HWS_PGA_GEN7;
                        break;