drm/i915/pxp: define PXP device flag and kconfig

Ahead of the PXP implementation, define the relevant define flag and
kconfig option.

v2: flip kconfig default to N. Some machines have IFWIs that do not
support PXP, so we need it to be an opt-in until we add support to query
the caps from the mei device.

v10: change comments from "Gen12+" to "Gen12 and newer"

Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210924191452.1539378-4-alan.previn.teres.alexis@intel.com

diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index f960f5d7664e6a0448d34cbace16b7297285f7f0..8859444943a083a632ee8b5899af4c204f0ce0aa 100644 (file)
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -131,6 +131,17 @@ config DRM_I915_GVT_KVMGT
          Choose this option if you want to enable KVMGT support for
          Intel GVT-g.
 
+config DRM_I915_PXP
+       bool "Enable Intel PXP support for Intel Gen12 and newer platform"
+       depends on DRM_I915
+       depends on INTEL_MEI && INTEL_MEI_PXP
+       default n
+       help
+         PXP (Protected Xe Path) is an i915 component, available on GEN12 and
+         newer GPUs, that helps to establish the hardware protected session and
+         manage the status of the alive software session, as well as its life
+         cycle.
+
 menu "drm/i915 Debugging"
 depends on DRM_I915
 depends on EXPERT

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 93d13aba6a850d31080b8b0edc535809c5f29a3a..357faa043b3af54bc4a3fd33dbab293dc79fdc17 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1700,6 +1700,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_GLOBAL_MOCS_REGISTERS(dev_priv)    (INTEL_INFO(dev_priv)->has_global_mocs)
 
+#define HAS_PXP(dev_priv)  ((IS_ENABLED(CONFIG_DRM_I915_PXP) && \
+                           INTEL_INFO(dev_priv)->has_pxp) && \
+                           VDBOX_MASK(&dev_priv->gt))
 
 #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
 

diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index d328bb95c49bff48e2eb9a60f4b6bf4f8479a081..8e6f48d1eb7bcb4402d4b777d5c32076fb206078 100644 (file)
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -133,6 +133,7 @@ enum intel_ppgtt_type {
        func(has_logical_ring_elsq); \
        func(has_mslices); \
        func(has_pooled_eu); \
+       func(has_pxp); \
        func(has_rc6); \
        func(has_rc6p); \
        func(has_rps); \